A 1-Mbit CMOS dynamic RAM with design-for test functions

McAdams, H.; Neal, J.H.; Holland, B.; Inoue, Satoshi; Loh, Wah Kit; Poteet, Ken

doi:10.1109/jssc.1986.1052588

Cited by 16 publications

(2 citation statements)

References 6 publications

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“…The problem of parallel testing has been addressed by other researchers in the past. In order to reduce the test time McAdams et al [2] fabricated a 1-Mbit CMOS three-dimensional (3D) DRAM with design-for test functions. They partitioned the memory into eight subarrays and tested them concurrently.…”

Section: Introductionmentioning

confidence: 99%

Parallel testing of parametric faults in a three-dimensional dynamic random-access memory

Mazumder

1988

IEEE J. Solid-State Circuits

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Ihis paper presents a testable design of dynamic randomaccess memory (DRAM) architecture which allows one to access multiple cells in a word l i e simultaneously. The technique utilizes the two-dimensional (2D) organization of the DRAM and the resulting speedup of the conventional algorithms is considerable. This paper specifically investigates the failure mechanisms in the three-dimensional (3D) DRAM with trench-type capacitor. As opposed to the earlier approaches for testing parametric faults that employed sliding diagonal-type tests with O (n 3 / 2) complexity, the algorithms discussed in this paper are different and have O (m) complexity, where p is the number of subarrays within the DRAM chip. These algorithms can be applied externally from the chip and also they can be easily generated for built-in self-test (BIST) applications.

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Section: Introductionmentioning

confidence: 99%

Parallel testing of parametric faults in a three-dimensional dynamic random-access memory

Mazumder

1988

IEEE J. Solid-State Circuits

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“…The second approach [23][24][25][26][27][28][29][30], uses extra hardware to partition the whole memory into small blocks and test them in parallel (using external test generation). Jarwala and Pradhan [25], showed that using partitioning methods, a significant saving in the test time can be achieved for large memories.…”

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confidence: 99%