1.5 V CMOS full-swing energy efficient logic (EEL) circuit suitable for low-voltage and low-power VLSI applications

Yeh, Chih-Ting; Lou, J.H.; Kuo, Jing-Lin

doi:10.1049/el:19970915

Cited by 18 publications

(8 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The adiabatic driver used in this configuration ( Figure 2) is based on adiabatic circuits presented in [9], [10], with the load capacitance replaced by the parasitic capacitance of TSVs (C T SV ).…”

Section: A Adiabatic Drivermentioning

confidence: 99%

Evaluation of energy-recovering interconnects for low-power 3D stacked ICs

Asimakopoulos

Plas

Yakovlev

et al. 2009

2009 IEEE International Conference on 3D System Integration

View full text Add to dashboard Cite

Abstract-Energy-recovering schemes have been proposed in the literature as an alternative approach to low-power design, while their performance has been demonstrated to be extremely promising when driving large capacitive loads, such as clock distribution networks [1]. This work investigates the potential of the energy-recovering methodology for improving the energy efficiency of through-silicon via (TSV) interconnects in 3D ICs.

show abstract

Section: A Adiabatic Drivermentioning

confidence: 99%

Evaluation of energy-recovering interconnects for low-power 3D stacked ICs

Asimakopoulos

Plas

Yakovlev

et al. 2009

2009 IEEE International Conference on 3D System Integration

View full text Add to dashboard Cite

show abstract

“…Let us assume that . Therefore, the probability of detection can be expressed as (10) where is the error function, which is defined as…”

Section: A System Performance Analysismentioning

confidence: 99%

“…The channel can be viewed as a time-invariant AWGN channel with within one refresh period, where is the variance of the channel noise within the th refresh period. The distributions of and derived in (10) and (14) can be applied to the analysis of the system performance within one refresh period. The variance of the channel noise may be different in different refresh periods, with the distribution modeled in (27).…”

Section: The Simulations Of Power Consumption and System Performancementioning

confidence: 99%

“…By observing Table IV, the over-sampling number of the conventional system is set at nine and the thresholds are set to 8 and 8. Equation (10) and (14) are calculated to verify that the system meets the and specifications at 5.85 dB. Therefore, the conventional system will meet the performance specifications for 95% of the period.…”

Section: The Simulations Of Power Consumption and System Performancementioning

confidence: 99%

See 1 more Smart Citation

Low-power adaptive pseudo noise code acquisition for spread-spectrum systems

Wu¹,

Wen²

2002

IEEE Trans. Wireless Commun.

View full text Add to dashboard Cite

Abstract-A novel pseudo noise code acquisition combined with the newly proposed adaptive sampling rate and threshold control (ASTC) algorithm is derived for low-power spread-spectrum systems with complementary metal-oxide-semiconductor implementations. Low-power performance can be achieved by reducing the sampling rate of the proposed system while maintaining the system performance. The sampling rate is dynamically updated due to the change of the channel noise level. Under the assumptions that the channel is additive white Gaussian noise slow-fading channel, up to 74.3% reduction in power consumption compared to the conventional fixed-sampling rate and fixed-threshold architecture is demonstrated with insignificant increase of system complexity. The proposed architecture can be applied to the design of low-power and controllable-performance spread-spectrum communication systems.

show abstract

“…But the outputs were still not full-swing due to the existance of the threshold voltage of two switching PMOS devices, resulting in nonadiabatic dissipation. After that, a full swing energy efficient logic (eel) [9] circuit was reported to give out a better performance, but the clock system was very complex (it needed eight clocks: four ramp-like power clocks and four pulse clocks) and therefore not practical. A novel adiabatic differential switch logic (adsl) with bootstrap technique introduced in [10] achieved better noise immunity, higher operation frequency and less energy dissipation.…”

Section: Introduction To Adiabatic Circuitsmentioning

confidence: 99%

Security wrappers and power analysis for SoC technologies

Gebotys

Zhang

2003

Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis

View full text Add to dashboard Cite

Future wireless internet enabled devices will be increasingly powerful supporting many more applications including one of the most crucial, security. Although SoCs offer more resistance to bus probing attacks, power/EM attacks on cores and network snooping attacks by malicious code are relevant. This paper presents a methodology for security on NoC at both the network level (or transport layer) and at the core level (or application layer) is proposed. For the first time a low cost security wrapper design is presented, which prevents unencrypted keys from leaving the cores and NoC. This is crucial to prevent untrusted software on or off the NoC from gaining access to keys. At the core level (application layer) power analysis attacks are examined for the first time for parallel and adiabatic architectural cores. With the emergence of secure IP cores in the market, a security methodology for designing NoCs is crucial for supporting future wireless internet enabled devices.

show abstract

1.5 V CMOS full-swing energy efficient logic (EEL) circuit suitable for low-voltage and low-power VLSI applications

Abstract: A 1.5V full-swing energy efficient logic circuit is reported that is suitable for next-generation low-power VLSI applications using a low supply voltage. At 25MHz and at lSV, the power consumption of the EEL circuit is 70% of that for an ECRL circuit and 47% of that for the static circuit.

Cited by 18 publications

References 3 publications

Evaluation of energy-recovering interconnects for low-power 3D stacked ICs

Evaluation of energy-recovering interconnects for low-power 3D stacked ICs

Low-power adaptive pseudo noise code acquisition for spread-spectrum systems

Security wrappers and power analysis for SoC technologies

Contact Info

Product

Resources

About