2009 IEEE International Conference on 3D System Integration 2009
DOI: 10.1109/3dic.2009.5306581
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Evaluation of energy-recovering interconnects for low-power 3D stacked ICs

Abstract: Abstract-Energy-recovering schemes have been proposed in the literature as an alternative approach to low-power design, while their performance has been demonstrated to be extremely promising when driving large capacitive loads, such as clock distribution networks [1]. This work investigates the potential of the energy-recovering methodology for improving the energy efficiency of through-silicon via (TSV) interconnects in 3D ICs.

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