In this paper, the influence of fin width on single event-upset (SEU) characteristics of 14 nm bulk and SOI FinFET 6 T SRAM is investigated by 3D TCAD mixed-mode simulation. Simulation results show that the threshold linear energy transfer (LET th ) of SOI FinFET SRAM is larger than bulk FinFET SRAM. Moreover, the LET th of bulk and SOI FinFET SRAM increases with fin width scaling, and LET th of SOI FinFET SRAM increases more rapidly than bulk FinFET counterpart. The results indicate that bulk and SOI FinFET SRAM would be more immune to SEU response as fin width scales down, especially for SOI FinFET SRAM. Furthermore, the effect of fin width on critical charge and collected charge are explored to explain the fin width dependence of LET th in FinFET SRAM. Both critical charge and collected charge decrease with fin width reducing. However, the collected charge decreases much faster, which becomes the dominant factor for single event sensitivity of FinFET SRAM with fin width scaling.
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