We analyzed the intrinsic defects and the n-type-carrier concentration generated by nitrogen ion implantation in n-type GaN by deep-level-transient spectroscopy and by capacitance–voltage measurements, respectively. The samples were grown on sapphire by metalorganic vapor-phase epitaxy. Nitrogen implantation with different ion doses and postimplantation rapid-thermal annealing (RTA) were investigated. We observed a growing n-type-carrier concentration and increasing defect concentration with increasing nitrogen ion implantation doses. After RTA the concentration of free carriers and deep levels as found in the as-grown state are restored. We also address contrarily seeming results from measurements of sheet resistance after N implantation published recently.

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Articles you may be interested inTheoretical calculation of the acoustic force on a patterned silicon wafer during megasonic cleaning Under gravitational and thermal constraints of integrated-circuit ͑IC͒ process technology, 300-mm-diam silicon wafers can deform via slip dislocation generation and propagation, degrading the electrical characteristics of the leading edge device. We present a force balance model to describe the strain relaxation in large wafer diameter, which includes heat transfer effects and the upper yield point of the silicon material. The material attributes, such as oxygen content and the state of oxygen aggregation, are taken into account. The theoretical approach allows the calculation of wafer mechanics and ramp rate profiles for an arbitrary high-temperature process. Plastic deformation of silicon wafers caused by thermal stresses at high temperatures can be controlled by process design. Deformation due to gravitational forces can be prevented through appropriate equipment design. The quantitative theory proposed here provides guidance for computer simulation to configure stable slip-free wafer process flow under mechanical and thermal loads. Applications include high speed simulation of ''what if?'' experiments, and initial simulations of large scale experimental sequences. The simulator developed can also be used by IC manufacturers to determine optimum wafer throughput and cycle times in front-end device processes.

Process induced crystal defects in silicon wafers can be detected by their stress fields. The nondestructive photoelasticity based on laser polarimetry is applied to visualize the stress fields of temperture gradient induced lattice defects like sliplines or extended defect areas around boat marks. The quantitative evaluation of the defects allows their characterization by a specific danger potential for further evolution causing upstream problems in IC manufacturing.

Layers of InP:Tm, GaAs:Tm, GaP:Tm, and GaInP:Tm have been grown by metal-organic vapor phase epitaxy at atmospheric pressure using tris(isopropylcyclopentadienyl)thulium as a liquid Tm source. Electrical measurements revealed no characteristic influence of Tm on the electrical properties of the semiconductor host. Tm3+-related 4f emissions at 1.2 and 1.9 μm are observed both in GaAs and GaInP. In GaAs, the Tm3+ 4f luminescence at 1.2 μm consists of a series of very sharp lines. In GaInP samples, the Tm3+-related luminescence at 1.2 μm is much stronger than in the GaAs samples and is still observable at room temperature.