Self-organized anodic titania nanotube layers were doped with nitrogen successfully using ion implantation. Photoelectrochemical measurements
combined with XRD measurements show that the damage created by ion bombardment (that leads to a drastic decrease of the photoconversion
efficiency) can be “annealed out” by an adequate heat treatment. This results in a N-doped crystalline anatase nanotube structure with
strongly enhanced photocurrent response in both the UV and the visible range.
N-channel MOSFETs were manufactured on p-type and on p-implanted, n-type 4H-SiC substrates. The electron mobility in the inversion channel was measured to be correlated with the structural and chemical properties determined by transmission electron microscopy. With regard to what was previously discussed in the literature, interfacial layer formation and carbon distribution across the SiC/SiO2 interface were considered in relation with the measured Hall electron mobility.
Normally-off 4H-SiC MOSFETs are used to build NMOS logic gates intended for high temperature operation. The logic gates are characterized between 25°C and 500°C. Stable gate operation for more than 200h at 400°C in air is demonstrated. The excellent MOS reliability is quantified using I-V curves to dielectric breakdown and constant voltage stress to breakdown at 400°C. Although the effective tunneling barrier height B for electrons lowers to 2eV at 400°C, the extrapolated lifetime from constant voltage stress to breakdown measurements is longer than 105h at 400°C for typical logic gate operating field strength of 2MV/cm.
We investigated the performance of different metallization/passivation systems for high temperature applications. The metallizations comprised a 150 nm sputtered Pt or a 150 nm e-beam evaporated PtRh layer on Ti/TiN underlayers, respectively. The passivation coatings consisted of amorphous PECVD SiOx, of amorphous stress-reduced PECVD SiNy, and of a SiOx/ SiNy stack. For samples with SiOx and SiOx/ SiNy passivation layers the electrical properties changed after a short high temperature anneal at 600 °C but then remained stable during further annealing. This was attributed to the formation of PtTi alloys, which stabilized the metallization stack. In samples with SiNy passivation a significant Pt out-diffusion into the passivation layer was observed. This led to a degradation of the electrical and mechanical properties. The best performance was achieved with Pt-based metallizations and SiOx or SiOx/SiNy passivations.
N-LDMOS and n-LIGBT structures were manufactured with the same dimensions on a 4H-SiC wafer in order to allow for a direct comparison. The comparison of the devices includes output and transfer characteristics, blocking characteristics, and temperature behavior.
Point contact current voltage (PCIV) measurements were performed on 4H-SiC samples, both for n- an p-doped epitaxial layers as well as samples with rather shallow doping profiles realized by N- or Al-implantation in a range from 1016 cm-3 to 1019 cm-3. Surface preparation and measurement parameters were investigated in order to determine their influence on the measured resistance profiles. Furthermore depth profile measurements were performed on both an epitaxial layer as well as on implanted samples. These depth profiles could be measured reproducibly and showed good agreement with expected profiles for Al-implanted samples as well as for epitaxial layer whereas for N-implanted samples deviations between measured and expected profiles could be observed. It could be proven that PCIV profiling technique is a promising method for characterizing doped profiles in 4H-SiC, especially on Al-implanted samples.
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