This paper introduces the basic properties, such as structure, transfer properties and arbitration of bus-based interconnections for System-on-Chip (SoC) designs. The overview shows that contemporary SoC buses difler only in minor details. As a result, practically every studied interconnection method could rather easily conform to a common interface. Such interface would enhance design re-use and make system design easier: However, due to their similariv, the choice between buses is not a straightforward task.0-7803-7448-7/02/$17.00 0 2 0 0 2 IEEE I1 -372

This paper presents a communication network targeted for complex system-on-chip (SoC) and network-on-chip (NoC) designs. The Heterogeneous IP Block Interconnection (HIBI) aims at maximum efficiency and minimum energy per transmitted bit combined with quality-of-service (QoS) in transfers. Other features include support for hierarchical topologies with several clock domains, flexible scalability, and runtime reconfiguration of network parameters. HIBI is intended for integrating coarse-grain components such as intellectual property (IP) blocks that have size of thousands of gates. HIBI has been implemented in VHDL and SystemC and synthesized on several CMOS technologies and on FPGA. A 32-bit wrapper requires 5400 gates and runs with 315 MHz on 0.18 μm technology which shows that only minimal area overhead is paid for the advanced features. The area and frequency results are well comparable to other NoC proposals. Furthermore, data transfers are shown to approach the maximum theoretical performance for protocol efficiency. HIBI network is accompanied with a design framework with tools for optimizing the system through automated design space exploration.

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This paper presents a modular way to synthesize on-chip interconnection architectures for very large scale integrated (VLSI) systems using generic components. The components use a standard interface and, therefore, the functionality of the system can be designed separately from the architecture. Examples from different ends of the performance and cost spectrum are presented. A bus is a simple interconnection that is still powerful enough for many applications. When larger transmission bandwidths, are needed, also a crossbar can he considered. The choice of the utilized network should be based on the requirements, of the application. The most important metrics helping the decision process are interconnection area and throughput. A bus network is found to be considerably smaller in area than a crossbar but the throughput of a crossbar is over two times higher in large data transfers. The throughput ,of the examined complex crossbar is mainly bounded by arbitration latencies.

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