In this article, we present the results of a study initiated to improve the step coverage of phosphosilicate glass (PSG) obtained with a low temperature LPCVD process and intended for use in VLSI multilevel interconnect structures. It is shown that increasing the PSG film thickness leads to a substantial improvement in the PSG step‐coverage profile, but could create problems for subsequent patterning steps. We have alleviated these problems through the use of dry etching to reduce the thickness of these films to values more compatible with VLSI multilevel interconnect technology, while successfully maintaining the superior step‐coverage profile obtained with the thicker PSG films.
Silicon dioxide films were grown on Si substrates by anodization in RF induced oxygen plasma at the pressure of 0.2 Torr and temperature of 600°C. SiO2 films of 1 µm in thickness were obtained within one hour. The selective oxidation was studied and Al2O3 was found to be effective in masking against the oxidation. The bird's beak shaped structure was greatly reduced.
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