Dry Etch‐Back of Overthick PSG Films for Step‐Coverage Improvement

Mercier, J.; Naguib, H. M.; Ho, V. Q.; Nentwich, H.

doi:10.1149/1.2114068

Cited by 12 publications

(9 citation statements)

References 10 publications

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“…There are essentially two methods of evaluating the angle made by a layer covering a step. The first consists in measuring the angle 0, or 02 between the tangent to the vertical side of the deposited layer and a horizontal axis (16,17) or a vertical axis, respectively (18) (Fig. 4).…”

Section: Are a C H I E V E D In An A1siti Layer H A V I N G A R E -E ...mentioning

confidence: 99%

“…The second method consists in measuring the angle 0:,, between the tangents to the vertical and horizontal sides of the deposited layer. Such angle m e a s u r e m e n t s are widely used and have been applied to the evaluation of P S G layers (16), P E T E O S films (17), P E C V D films (18), B P S G reflow (19), and SOG planarization (20).…”

Section: Are a C H I E V E D In An A1siti Layer H A V I N G A R E -E ...mentioning

confidence: 99%

“…The thickness ratios can either be the ratio between the thickness at the bottom of the trench and the nominal line thickness (8,10), or the ratio between the lateral thickness and the nominal line thickness (5, 8-10, 16, 18). The lateral thickness can either be the m i n i m u m sidewall thickness (5,8,16,18), the thickness at the top of the step, or the thickness at the bottom of the deposited layer (9,10). The thickness ratios are widely used, and can be called "percent planarization" (12), "percent coverage" (21), "degree of planarization" (22), or simply "step coverage" (23).…”

Section: Are a C H I E V E D In An A1siti Layer H A V I N G A R E -E ...mentioning

confidence: 99%

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Characterization of Borosilicate Glass Step Coverage for Multilevel Interconnection Applications

Saicherre¹,

Rey²,

Chatagnon³

1991

J. Electrochem. Soc.

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The step coverage of atmospheric pressure chemical vapor deposited borosilicate glass (BSG) has been studied in detail. The optimized deposition conditions have been obtained for an oxygen/hydride ratio of 70/1 and a 4% boron concentration. Various BSG thicknesses obtained by only changing the speed of the earrmr moving belt have been deposited over different kinds of metal steps, with sloped profiles or re-entrant angle profiles and with different step heights. The oxide thickness, et, the metal thickness, h, and the spacing, d, between two metal lines have been chosen to cover a wide range of thickness ratios eJh and aspect ratios h/d. The step coverage evaluation (bottom and lateral coverage) is performed by measuring thickness ratios, which are reported on (e~/h, h/d) diagrams. Well-defined curves of identical coverage can be drawn on the (ejh, h/d) diagrams, showing that the step coverage of the BSG films is clearly correlated with the thickness ratio ejh and the aspect ratio h/d, but does not simply depend on e,, h, and d values. The limit curves of void formation and of constant coverage are drawn on these diagrams for the two metal profiles. A void formation limit is determined by the vertical asymptote to the void formation curve. This limit is obtained for an aspect ratio of 0.6 when metal steps have a re-entrant angle profile, and 0.75 when metal steps have a sloped s~dewall profile. The step coverage results are then discussed in detail. Finally, the use of graphic representation of step coverage results on the (eJh, h/d) diagrams is emphasized for comparison of deposition techniques, choice of methods to elaborate intermetal dielectric, and as a guide to the design of new multilevel technologies.Multilevel interconnection has become an essential technology for improving the performances and packing density of very large scale integrated circuits (VLSI). As the pattern size is reduced, the metal thickness cannot bc reduced proportionally. The aspect ratio (height to space ratio of interconnection) approaches 1.0 or becomes greater. New processes or materials need to be developed to obtain interlayer insulators: (i) with good step coverage and void-free filling of steep grooves, (ii) with total or partial planarization or capable of being planarized, (iii) with a short manufacturing time and no damaging of the underlying devices.Several techniques for h)rming planar insulation layers with high aspect ratios have been developed: polyimide (1), sandwich structure with permanent spin-on-glass (SOG) (2), SiOz bias sputtering (3), multiple depositionetch process in a single tool (4), and BSG (5, 6).The polyimides or SOG, due to their organic nature, are subject to reliability problems related to electrical properties, contamination, adhesion, and moisture properties. Bias sputtering techniques or multiple deposition-etch processes may be limited because of their low deposition rate and their tendency to damage the device characteristics.BSG has been shown to be suitable for practical application as interlev...

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Section: Are a C H I E V E D In An A1siti Layer H A V I N G A R E -E ...mentioning

confidence: 99%

Section: Are a C H I E V E D In An A1siti Layer H A V I N G A R E -E ...mentioning

confidence: 99%

Section: Are a C H I E V E D In An A1siti Layer H A V I N G A R E -E ...mentioning

confidence: 99%

See 1 more Smart Citation

Characterization of Borosilicate Glass Step Coverage for Multilevel Interconnection Applications

Saicherre¹,

Rey²,

Chatagnon³

1991

J. Electrochem. Soc.

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“…Since the conventional CVD (chemical vapor deposition) oxide layers provide only a conformal step coverage, a number of techniques have been developed in recent years which either deposit a planarizing dielectric layer or effect the planarization of the conformal CVD layer [1][2][3][4][5][6][7][8][9][10][11].…”

Section: Introductionmentioning

confidence: 99%

Spin-On Glass Films in Multilevel Ic Interconnection

Gupta¹

1987

MRS Proc.

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Among the variety of techniques available today for interlevel dielectric planarization, techniques based on spin-on glass (SOG) films are relatively attractive because of process simplicity and minimal equipment requirements.This paper reviews the materials and processes of SOG technology as it is applied in dielectric planarization. The SOG planarization schemes employ SOG films either as a permanent part of the interlevel insulation layer or as a sacrificial layer in the 'etch-back' techniques.The properties of the various types of comnircially available SOG materials are discussed in relation to their functional and processing characteristics.

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“…Therefore, planarizing interlayer films are widely used to smooth out the topography. Among the proposed candidates, etch-back processes (1,2), bias-sputtered quartz (3,4), and spin-on dielectric films have been studied quite extensively. Both organic and inorganic spin-on films have been proposed as planarizing layers.…”

mentioning

confidence: 99%

Material Characteristics of Spin‐On Glasses for Interlayer Dielectric Applications

Pai

Chetty

Roat

et al. 1987

J. Electrochem. Soc.

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The material properties of several commercial spin-on glasses were investigated. Infrared spectrophotometry was used to study the annealing effects on thecontents of hydroxyl and organic groups. Their concentrations are found to be sensitive to the annealing temperatures and annealing ambients. Both the room-temperature stress and the in situ stress during annealing were monitored. The measured stress levels of films on Si wafers are low (less than 108 Pa in tensile) compared to other deposited silicon dioxide films. Dielectric properties, including dielectric constants and dissipation factors, were also examined as a function of annealing conditions. A strong correlation between the dielectric properties and the OH content in the film was established. Of the two films studied most extensively, one showed significantly better dielectric properties following low-temperature (<600~ curing. Both are good dielectric films for VLSI interlayer dielectric applications if high-temperature annealings are allowed.

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Dry Etch‐Back of Overthick PSG Films for Step‐Coverage Improvement

Cited by 12 publications

References 10 publications

Characterization of Borosilicate Glass Step Coverage for Multilevel Interconnection Applications

Characterization of Borosilicate Glass Step Coverage for Multilevel Interconnection Applications

Spin-On Glass Films in Multilevel Ic Interconnection

Material Characteristics of Spin‐On Glasses for Interlayer Dielectric Applications

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