We introduce ex p erimental, modeling and simulation results of the electrical p erformance of 28nm FETs, operated under the action of an external magnetic field B. Negative resistance and magneto-current am p lification are some of the effects discussed through this research com p ilation done within the Microelectronics research
We introduce an experimental alternative way of looking into the charging and discharging mechanism inside a high-k stacked oxide of a metal-gate strained n-type Field-Effect-Transistor (nFET). This alternative way reproduces a memory and negative resistance effect by biasing the nFET device in a non-conventional way. This is achieved by forward-biasing the drain-bulk junction and by setting the gate electrode in a high-impedance mode. The produced negative resistance effect (NRE) has a controllable peak-to-valley current ratio (PVCR) that goes from about 3.0 up to a value of 5.5 at room temperature. The PVCR increases up to 8.35 at T=225 K and reduces to 2.84 at T=375 K in a linear trend. The memory effect is observed when the drain-bulk junction voltage is swept from low to high values and back from high to low values. From low to high forward drain-bulk bias the NRE shows up and vanishes when coming back from high to low forward drain-bulk bias. The NRE and memory effects are attributed to a coupled-gate oxide charging/discharging mechanism with an induced bipolar transistor action in the channel of the FET.
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