In this paper we deal with the problem of the finite states machine's (FSM) state assignment. CMOSbased digital circuits dissipate a power only during a transition at the output. Therefore one of the methods of the power minimization is to reassign the FSM states. We discuss the methods such as column-based and annealing-based as well as propose the new method called sequential method. Experimental results showed that the proposed method is approximately 10% better than the other discussed algorithms.
This paper presents FPGA and softcore CPU based solution for large datasets parallel core calculation using rough set methods. Architectures shown in this paper have been tested on two real datasets running presented solutions inside FPGA unit. Tested datasets had 1 000 to 10 000 000 objects. The same operations were performed in software implementation. Obtained results show the big acceleration in computation time using hardware supporting core generation in comparison to pure software implementation.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.