Field-effect transistors based on two-dimensional materials could potentially be used in very large-scale integration (VLSI) technology. But whether they can be used at the front end of line or at the back end of line through monolithic or heterogeneous integration remains to be seen. In order to achieve this, multiple challenges must be overcome including reducing contact resistance, developing stable and controllable doping schemes, advancing mobility engineering, and improving high-k dielectric integration. The large-area growth of uniform 2D layers is also required to ensure low defect density, low device-to-device variation, and clean interfaces. Here we review the development of 2D field-effect transistors for use in future VLSI technologies. We consider the key performance indicators for aggressively scaled 2D transistors and discuss how these should be extracted and reported.We also highlight potential applications of 2D transistors in conventional micro/nanoelectronics, neuromorphic computing, advanced sensing, data storage, and future interconnect technologies.

Nanoelectronic devices based on 2D materials are far from delivering their full theoretical performance potential due to the lack of scalable insulators. Amorphous oxides that work well in silicon technology have ill-defined interfaces with 2D materials and numerous defects, while 2D hexagonal boron nitride does not meet required dielectric specifications. The list of suitable alternative insulators is currently very limited. Thus, a radically different mindset with respect to suitable insulators for 2D technologies may be required. We review possible solution scenarios like the creation of clean interfaces, production of native oxides from 2D semiconductors and more intensive studies on crystalline insulators.

No abstract

No abstract

The commonly observed hysteresis in the transfer characteristics of MoS 2 transistors is typically associated with charge traps in the gate insulator. Since in Si technologies such traps can lead to severe reliability issues, we perform a combined study of both the hysteresis as well as the arguably most important reliability issue, the bias-temperature instability. We use single-layer MoS 2 FETs with SiO 2 and hBN insulators and demonstrate that both phenomena are indeed due to traps in the gate insulator with time constants distributed over wide timescales, where the faster ones lead to hysteresis and the slower ones to bias-temperature instabilities. Our data show that the use of hBN as a gate insulator considerably reduces the number of accessible slow traps and thus improves the reliability. However, the reliability of hBN insulators deteriorates with increasing temperature due to the thermally activated nature of charge trapping.

No abstract

No abstract

The performance of MoS 2 transistors is strongly affected by charge trapping in oxide traps with very broad distributions of time constants. These defects degrade the mobility and additionally lead to the hysteresis of the gate transfer characteristics, which presents a crucial performance and reliability issue for these new technologies. Here we perform a detailed study of the hysteresis in double-gated MoS 2 FETs and show that this issue is nothing else than a combination of threshold voltage shifts resulting from positive and negative bias-temperature instabilities. While these instabilities are well known from silicon devices, they are even more important in 2D devices given the considerably larger defect densities. Most importantly, the magnitudes of these threshold voltage shifts depend strongly on the density and energetic alignment of the active oxide traps. Based on this, we introduce the incremental hysteresis sweep method which allows for an accurate mapping of these defects and extract their energy distributions from simulations. By applying our method to analyze the impact of oxide traps situated in the Al 2 O 3 top gate of several devices, we confirm its versatility. Since all 2D devices investigated so far suffer from a similar hysteresis behavior, the incremental hysteresis sweep method provides a unique and powerful way for the detailed characterization of their defect bands.