The strong coupling constants, gD(s)DK(0)*, gB(s)BK(0)*, gD(s)*DK, gB(s)*BK, gD(s)*DK1 and gB(s)*BK(1), where K(0)*, K and K(1) are scalar, pseudoscalar, and axial-vector kaon mesons, respectively, are calculated in the framework of three-point QCD sum rules. In particular, the correlation functions of the considered vertices when both B(D) and K(0)*(K)(K(1)) mesons are off shell are evaluated. In the case of K(1), which is either K(1)(1270) or K(1)(1400), the mixing between these two states are also taken into account. A comparison of the obtained result with the existing prediction on g(Ds)*(DK) as the only coupling constant among the considered vertices, previously calculated in the literature, is also made
Designing block ciphers targeting resource constrained 8-bit CPUs is a challenging problem. There are many recent lightweight ciphers designed for better performance in hardware. On the other hand, most software efficient lightweight ciphers either lack a security proof or have a low security margin. To fill the gap, we present RoadRunneR which is an efficient block cipher in 8-bit software, and its security is provable against differential and linear attacks. RoadRunneR has lowest code size in Atmel's ATtiny45, except NSA's design SPECK, which has no security proof. Moreover, we propose a new metric for the fair comparison of block ciphers. This metric, called ST/A, is the first metric to use key length as a parameter to rank ciphers of different key length in a fair way. By using ST/A and other metrics in the literature, we show that RoadRunneR is competitive among existing ciphers on ATtiny45.
In this paper, two-layered feed forward artificial neural network's (ANN) training by back propagation and its implementation on FPGA (field programmable gate array) using floating point number format with different bit lengths are remarked based on EX-OR problem. In the study, being suitable with the parallel data-processing specification on ANN's nature, it is especially ensured to realize ANN training operations parallel over FPGA. On the training, Virtex2vp30 chip of Xilinx FPGA family is used. The network created on FPGA is coded by using VHDL. By comparing the results to available literature, the technique developed here proved to consume less space for the subjected ANN training which has the same structure and bit length, it is shown to have better performance.
The transition form factors of the semileptonic B → D * 2 (2460)ℓν (ℓ = τ, µ, e) decay channel are calculated within the framework of the three-point QCD sum rules. The fit functions of the form factors are then used to estimate the total decay width and branching ratio of this transition. The order of branching ratio shows that this channel can be detected at LHCb.
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