In this paper, two-layered feed forward artificial neural network's (ANN) training by back propagation and its implementation on FPGA (field programmable gate array) using floating point number format with different bit lengths are remarked based on EX-OR problem. In the study, being suitable with the parallel data-processing specification on ANN's nature, it is especially ensured to realize ANN training operations parallel over FPGA. On the training, Virtex2vp30 chip of Xilinx FPGA family is used. The network created on FPGA is coded by using VHDL. By comparing the results to available literature, the technique developed here proved to consume less space for the subjected ANN training which has the same structure and bit length, it is shown to have better performance.
Artificial Neural Network (ANN) training using gradient-based Levenberg & Marquardt (LM) algorithm has been implemented on FPGA for the solution of dynamic system identification problems within the scope of the study. In the implementation, IEEE 754 floating-point number format has been used because of the dynamism and sensitivity that it has provided. Mathematical approaches have been preferred to implement the activation function, which is the most critical phase of the study. ANN is tested by using input-output sample sets, which are shown or not shown to the network in the training phase, and success rates are given for every sample set. The obtained results demonstrate that implementation of FPGA-based ANN training is possible by using LM algorithm and as the result of the training, the ANN makes a good generalization.
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