An ultra broadband MMIC amplifier is designed using InP double-heterojunction bipolar transistors and its onchip measurements are reported. The multi-cell distributed amplifier uses four gain cells where each consists of a common collector input stage followed by a cascode gain stage. The chip includes bias, decoupling and terminating circuits for the dc and RF interconnects; it measures 0.72 mm by 0.4 mm. It consumes 210 mW of power and can deliver up to 5.5 dBm of output power at 195 GHz. The amplifier achieves an average gain of 13.5 dB with an overall bandwidth over 200 GHz and a ± 2 dB gain ripple. The measurements indicate that this is the widest band dc-coupled amplifier reported to date and has the highest bandwidth reported among non-cascaded distributed amplifiers.
In this work we present two transimpedance amplifier (TIA) circuits designed for fibre optical interconnect systems. We compare a common base (CB) topology with a common emitter (CE) shunt-shunt feedback topology in terms of frequency response, power consumption, noise and input impedance. The two TIAs are designed on a 130nm InP DHBT technology from Teledyne Scientific Company (TSC) with an ft/fmax of 520 GHz/1.15 THz and are measured in the frequency and time domains. They exhibit a TI-gain of 42 dBΩ with a 133 GHz bandwidth, the highest bandwidth reported in literature and a power consumption of 32.3 mW for the CB and 25.5 mW for the CE. Eye diagram measurements were conducted up to 64 Gbps and input referred noise density was measured at 30.2 pA/√𝐻𝑧 for the CB and 13.9 pA/√𝐻𝑧 for the CE.
This paper highlights the gain-bandwidth merit of the single stage distributed amplifier (SSDA) and its derivative multiplicative amplifier topologies (i.e. the cascaded SSDA (C-SSDA) and the matrix SSDA (M-SSDA)), for ultra-wideband amplification. Two new monolithic microwave integrated circuit (MMIC) amplifiers are presented: an SSDA MMIC with 7.1 dB average gain and 200 GHz bandwidth; and the world's first M-SSDA, which has a 12 dB average gain and 170 GHz bandwidth. Both amplifiers are based on an Indium Phosphide DHBT process with 250 nm emitter width. To the authors best knowledge, the SSDA has the widest bandwidth for any single stage amplifier reported to date. Furthermore, the three tier M-SSDA has the highest bandwidth and gain-bandwidth product for any matrix amplifier reported to date.
We report the design of a 112 Gb/s radiation-hardened (RH) optical transceiver applicable to intra-satellite optical interconnects. The transceiver chipset comprises a vertical-cavity surface-emitting laser (VCSEL) driver and transimpedance amplifier (TIA) integrated circuits (ICs) with four channels per die, which are adapted for a flip-chip assembly into a mid-board optics (MBO) optical transceiver module. The ICs are designed in the IHP 130 nm SiGe BiCMOS process (SG13RH) leveraging proven robustness in radiation environments and high-speed performance featuring bipolar transistors (HBTs) with fT/fMAX values of up to 250/340 GHz. Besides hardening by technology, radiation-hardened-by-design (RHBD) components are used, including enclosed layout transistors (ELTs) and digital logic cells. We report design features of the ICs and the module, and provide performance data from post-layout simulations. We present radiation evaluation data on analog devices and digital cells, which indicate that the transceiver ICs will reliably operate at typical total ionizing dose (TID) levels and single event latch-up thresholds found in geostationary satellites.
In this work, the authors present two transimpedance amplifier (TIA) circuits designed for fibre optical interconnect systems. They compare a common base (CB) topology with a common emitter (CE) shunt-shunt feedback topology in terms of frequency response, power consumption, noise, and input impedance. The two TIAs are designed on a 130 nm indium phosphide double heterojunction bipolar transistor technology from Teledyne Scientific Company (TSC) with an f t /f max of 520 GHz/1.15 THz and are measured in the frequency and time domains. They exhibit a transimpedance gain of 42 dBΩ with a 133 GHz bandwidth, the highest bandwidth reported in the literature and power consumption of 32.3 mW for the CB and 25.5 mW for the CE. Eye diagram measurements were conducted up to 64 Gbps and input referred noise density was measured at 30.2 pA/ Hz √ for the CB and 13.9 pA/ Hz √ for the CE.
In this paper, we review the merit of the single stage distributed amplifier (SSDA) and consider the potential of its derivative multiplicative amplifier topologies (the cascaded and the matrix SSDA) for ultra-wideband amplification. We highlight the significant bandwidth advantage that the SSDA topology offers and the higher gain potential of multiplicative DAs compared to the conventional multi-stage DA. Furthermore, we describe how available design trade-offs may be used to offset inherent noise performance limitations of this family of distributed amplifiers. We also report a new SSDA MMIC with 7.1 dB gain at 200 GHz bandwidth and a high frequency gain tuning range of 5 dB to 12 dB, based on an Indium Phosphide DHBT process with 250 nm emitter width.
The EU-SIPhoDiAS project deals with the development of critical photonic building blocks needed for highperformance and low size, weight, and power (SWaP) photonics-enabled Very High Throughput Satellites (VHTS). In this presentation, we report on the design and fabrication activities during the first year of the project concerning the targeted family of digital and microwave photonic components. This effort aims to demonstrate components of enhanced reliability at technology readiness level (TRL) 7. Specifically, with respect to microwave photonic links, we report: (i) the design of Ka and Q-bands analogue photodetectors that will be assembled in compact packages, allowing for very high bandwidth per unit area and (ii) on the design of compact V-band GaAs electro-optic modulator arrays, which use a folded-path optical configuration to manage all fiber interfaces packaged opposite direct in-line RF feeds for ease of board layouts and mass/size benefits. With respect to digital links, we report on the development of 100 Gb/s (4 x 25 Gb/s) digital optical transceiver sub-assemblies developed using flip-chip mounting of electronic and opto-parts on a high-reliability borosilicate substrate. The transceiver chipset developed specifically for this project refers to fullycustom 25 Gb/s radiation hard (RH) VCSEL driver and TIA ICs designed in IHP's 130 nm SiGe BiCMOS Rad-Hard process.
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