The dependence of the barrier height of metal-semiconductor systems upon the metal work function is derived based on the following assumptions: (1) the contact between the metal and the semiconductor has an interfacial layer of the order of atomic dimensions; it is further assumed that this layer is transparent to electrons with energy greater than the potential barrier but can withstand potential across it. (2) The surface state density (per unit area per electron volt) at the interface is a property only of the semiconductor surface and is independent of the metal. The barrier height φBn is defined here as the energy needed by an electron at the Fermi level in the metal to enter the conduction band of the semiconductor. With the above assumptions, the barrier height for n-type semiconductor-metal contacts is found to be a linear combination of the metal work function φm and a quantity φ0 which is defined as the energy below which the surface states must be filled for charge neutrality at the semiconductor surface. The energy φ0 is measured from the edge of the valence band. For constant surface state density the theoretical expression obtained is φBn=γ(φm−χ)+(1−γ)(Eg−φ0)−Δφn,where χ and Eg are electron affinity and the band gap of the semiconductor, respectively, Δφn is the image force barrier lowering, and γ is a weighting factor which depends mainly on the surface state density and the thickness of the interfacial layer. The theoretical expression is compared to the presently available φBn VS φm data for Si, GaP, GaAs, and CdS, by fitting the data to straight lines using the method of least squares. The best straight-line fit was obtained for the GaP data, with probable error limits on the slope and intercept of ±0.03 and ±0.13 eV, respectively. The parameter γ in the theoretical expression is found to range from 0.07 for GaAs to almost unity for the CdS data reported by Goodman indicating weak and strong dependence of the surface barrier height on the metal work function, respectively. The value of φ0 is roughly a third of the respective band gap energies for Si, GaP, and GaAs, and the surface state density for these semiconductors is found to be in the range 1013−1014 states/cm2/eV, for the experiments cited. Excessive scatter in the data points for the CdS data of Mead and Spitzer casts doubt on the significance of a straight-line fit for this case. The data of Goodman for CdS obey the Schottky theory for a metal-semiconductor barrier, but this agreement requires a value of the electron affinity χ which is different from the vacuum-photothreshold value measured by other authors.

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.

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Measurements of current-voltage characteristics have been performed on Au-Si3NcMo and Au-Si3N4-Si (degenerate substrate) structures of various nitride-film thicknesses from 300 A to 3000 A and over a range of temperatures. The films are deposited by the process of reaction of SiC4 with NH3. It is found that at any given temperature and electric field, the current transport is essentially independent of the substrate material, the film thickness, or the polarity of the electrodes.It is proposed that the current-transport mechanisms are bulk controlled rather than electrode controlled. The conduction-current density, J, is the sum of three contributions: J=J1+J2+J3, where Jl~Eexp{-q[

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