Overview of emerging nonvolatile memory technologies

Meena, Jagan Singh; Sze, Simon M.; Chand, Umesh; Tseng, Tseung‐Yuen

doi:10.1186/1556-276x-9-526

Cited by 605 publications

(326 citation statements)

References 125 publications

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“…For the human-scale case, a 10x increase in density would be needed to bring the number of wafers down to a feasible level (<30) for 3D-WSI. These density increases may be possible with advances in emerging memory technologies [Meena et al 2014]; one promising example is given in Cappelletti [2015].…”

Section: Discussionmentioning

confidence: 99%

Toward Human-Scale Brain Computing Using 3D Wafer Scale Integration

Kumar

Wan

Wilcke

et al. 2017

J. Emerg. Technol. Comput. Syst.

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The Von Neumann architecture, defined by strict and hierarchical separation of memory and processor, has been a hallmark of conventional computer design since the 1940s. It is becoming increasingly unsuitable for cognitive applications, which require massive parallel processing of highly interdependent data. Inspired by the brain, we propose a significantly different architecture characterized by a large number of highly interconnected simple processors intertwined with very large amounts of low-latency memory. We contend that this memory-centric architecture can be realized using 3D wafer scale integration for which the technology is nearing readiness, combined with current CMOS device technologies. The natural fault tolerance and lower power requirements of neuromorphic processing make 3D wafer stacking particularly attractive. In order to assess the performance of this architecture, we propose a specific embodiment of a neuronal system using 3D wafer scale integration; formulate a simple model of brain connectivity including short-and long-range connections; and estimate the memory, bandwidth, latency, and power requirements of the system using the connectivity model. We find that 3D wafer scale integration, combined with technologies nearing readiness, offers the potential for scaleup to a primate-scale brain, while further scaleup to a human-scale brain would require significant additional innovations.

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Section: Discussionmentioning

confidence: 99%

Toward Human-Scale Brain Computing Using 3D Wafer Scale Integration

Kumar

Wan

Wilcke

et al. 2017

J. Emerg. Technol. Comput. Syst.

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“…Poly[(9,9-di-n-octylfluorenyl-2,7-diyl)-alt-(benzo [2,1,3]thiadiazol-4,8-diyl)] (F8BT) (Mn = 4.9 kDa, D = 1.8) was synthesized according to a modified Suzuki polymerization. [35,36] Poly(bis(4-phenyl)2,3,4-trimethylphenyl)amine (PTAA) (Mn = 17.5 kDa) was purchased from Flexink and used as received.…”

Section: Methodsmentioning

confidence: 99%

“…[1,2] Solution-processed organic ferroelectric resistive switches have recently been proposed as a very promising practical realization of a non-volatile memory that can be read out non-destructively and is compatible with flexible electronics and large area applications. [3,4] The organic ferroelectric resistive switch consists of a thin film made of a polymeric semiconductor-ferroelectric blend sandwiched between two electrodes.…”

Section: Introductionmentioning

confidence: 99%

Data retention in organic ferroelectric resistive switches

Khikhlovskyi

Breemen

Janssen

et al. 2016

Organic Electronics

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Solution-processed organic ferroelectric resistive switches could become the long-missing non-volatile memory elements in organic electronic devices. To this end, data retention in these devices should be characterized, understood and controlled. First, it is shown that the measurement protocol can strongly affect the 'apparent' retention time and a suitable protocol is identified. Second, it is shown by experimental and theoretical methods that partial depolarization of the ferroelectric is the major mechanism responsible for imperfect data retention. This depolarization occurs in close vicinity to the semiconductor-ferroelectric interface, is driven by energy minimization and is inherently present in this type of phase-separated polymer blends. Third, a direct relation between data retention and the charge injection barrier height of the resistive switch is demonstrated experimentally and numerically. Tuning the injection barrier height allows to improve retention by many orders of magnitude in time, albeit at the cost of a reduced on/off ratio. Corresponding Author

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“…4,5 The fast and reversible phase transition in Ge 2 Sb 2 Te 5 alloys can be achieved by Joule heating, 5 and this process can be employed in nonvolatile phase-change memory with lower programming voltages and higher memory densities than mainstream nonvolatile memory technologies. 2,3,6,7 Some layered and two-dimensional (2D) materials including MoTe 2 have been reported or predicted to exhibit structural phase changes during chemical processes, 8,9 temperature changes, [10][11][12][13][14] and tensile strains. 15,16 Some single layer transition metal dichalcogenide (TMD) monolayers, including monolayer MoTe 2 , can exist in a semiconducting trigonal prismatic state found in the bulk 2H structure, a semimetallic distorted octahedral state found in the bulk 1T′ monoclinic and orthorhombic (sometimes referred to as T d ) phases, and possibly other structures.…”

Section: Introductionmentioning

confidence: 99%

Theoretical potential for low energy consumption phase change memory utilizing electrostatically-induced structural phase transitions in 2D materials

Rehn

Pop

et al. 2018

npj Comput Mater

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Structural phase-change materials are of great importance for applications in information storage devices. Thermally driven structural phase transitions are employed in phase-change memory to achieve lower programming voltages and potentially lower energy consumption than mainstream nonvolatile memory technologies. However, the waste heat generated by such thermal mechanisms is often not optimized, and could present a limiting factor to widespread use. The potential for electrostatically driven structural phase transitions has recently been predicted and subsequently reported in some two-dimensional materials, providing an athermal mechanism to dynamically control properties of these materials in a nonvolatile fashion while achieving potentially lower energy consumption. In this work, we employ DFT-based calculations to make theoretical comparisons of the energy required to drive electrostatically-induced and thermally-induced phase transitions. Determining theoretical limits in monolayer MoTe 2 and thin films of Ge 2 Sb 2 Te 5 , we find that the energy consumption per unit volume of the electrostatically driven phase transition in monolayer MoTe 2 at room temperature is 9% of the adiabatic lower limit of the thermally driven phase transition in Ge 2 Sb 2 Te 5 . Furthermore, experimentally reported phase change energy consumption of Ge 2 Sb 2 Te 5 is 100-10,000 times larger than the adiabatic lower limit due to waste heat flow out of the material, leaving the possibility for energy consumption in monolayer MoTe 2 -based devices to be orders of magnitude smaller than Ge 2 Sb 2 Te 5 -based devices.

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Overview of emerging nonvolatile memory technologies

Cited by 605 publications

References 125 publications

Toward Human-Scale Brain Computing Using 3D Wafer Scale Integration

Toward Human-Scale Brain Computing Using 3D Wafer Scale Integration

Data retention in organic ferroelectric resistive switches

Theoretical potential for low energy consumption phase change memory utilizing electrostatically-induced structural phase transitions in 2D materials

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