Direct formation of high-quality and wafer scale graphene thin layers on insulating gate dielectrics such as SiO(2) is emergent for graphene electronics using Si-wafer compatible fabrication. Here, we report that in a chemical vapor deposition process the carbon species dissociated on Cu surfaces not only result in graphene layers on top of the catalytic Cu thin films but also diffuse through Cu grain boundaries to the interface between Cu and underlying dielectrics. Optimization of the process parameters leads to a continuous and large-area graphene thin layers directly formed on top of the dielectrics. The bottom-gated transistor characteristics for the graphene films have shown quite comparable carrier mobility compared to the top-layer graphene. The proposed method allows us to achieve wafer-sized graphene on versatile insulating substrates without the need of graphene transfer.

A nine-layer WS/MoS heterostructure is established on a sapphire substrate after sequential growth of large-area and uniform five- and four-layer MoS and WS films by using sulfurization of predeposited 1.0 nm molybdenum (Mo) and tungsten (W), respectively. By using the results obtained from the ultraviolet photoelectron spectroscopy and the absorption spectrum measurements of the standalone MoS and WS samples, a type-II band alignment is predicated for the WS/MoS heterostructure. Increasing drain currents and enhanced field-effect mobility value of the transistor fabricated on the heterostructure suggested that a channel with higher electron concentration compared with the standalone MoS transistor channel is obtained with electron injection from WS to MoS under thermal equilibrium. Selective 2D crystal growth with (I) blank sapphire substrate, (II) standalone MoS, (III) WS/MoS heterostructure, and (IV) standalone WS was demonstrated on a single sapphire substrate. The results have revealed the potential of this growth technique for practical applications.

A ten-stacked self-assembled InAs/GaAs quantum-dot infrared photodetector operated in the 2.5-7 m range by photovoltaic and photoconductive mixed-mode near-room-temperature operation ͑у250 K͒ was demonstrated. The specific peak detectivity D* is 2.4ϫ10 8 cm Hz 1/2 /W at 250 K. The use of high-band-gap Al 0.3 Ga 0.7 As barriers at both sides of the InAs quantum-dot structure and the long carrier recombination time are the key factors responsible for its near-room-temperature operation.

Single-crystal antimonene flakes are observed on sapphire substrates after the postgrowth annealing procedure of amorphous antimony (Sb) droplets prepared by using molecular beam epitaxy at room temperature. The large wetting angles of the antimonene flakes to the sapphire substrate suggest that an alternate substrate should be adopted to obtain a continuous antimonene film. By using a bilayer MoS/sapphire sample as the new substrate, a continuous and single-crystal antimonene film is obtained at a low growth temperature of 200 °C. The results are consistent with the theoretical prediction of the lower interface energy between antimonene and MoS. The different interface energies of antimonene between sapphire and MoS surfaces lead to the selective growth of antimonene only atop MoS surfaces on a prepatterned MoS/sapphire substrate. With similar sheet resistance to graphene, it is possible to use antimonene as the contact metal of 2D material devices. Compared with Au/Ti electrodes, a specific contact resistance reduction up to 3 orders of magnitude is observed by using the multilayer antimonene as the contact metal to MoS. The lower contact resistance, the lower growth temperature, and the preferential growth to other 2D materials have made antimonene a promising candidate as the contact metal for 2D material devices.