Background: Medicare-Medicaid dual eligibles are the beneficiaries of both Medicare and Medicaid. Dual eligibles satisfy the eligibility conditions for Medicare benefit. Dual eligibles also qualify for Medicaid because they are aged, blind, or disabled and meet the income and asset requirements for receiving Supplement Security Income (SSI) assistance. The objective of this study is to explore the relationship between dual eligibility and health care utilization among Medicare beneficiaries.

In this work, the measured electrical characteristics of a fully depleted silicon-on-insulator (FDSOI) device and finshaped field-effect transistor (FinFET), whose gate electrode is connected in series to the bottom electrode of a ferroelectric capacitor (FE-FDSOI/FE-FinFET), are experimentally studied. The hysteretic property in input transfer characteristic of those devices is desirable for memory device applications, so that the understanding and modulating the hysteresis window is a key knob in designing the devices. It is experimentally observed that the hysteresis window of FE-FDSOI/FE-FinFET is decreased with (i) increasing the area of the ferroelectric capacitor and/or (ii) decreasing the gate area of baseline FET. The way how to control the hysteresis window of FE-FDSOI/FE-FinFET is proposed and discussed in detail.

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The endurance characteristic of Zr-doped HfO2 (HZO)-based metal–ferroelectric–metal (MFM) capacitors fabricated under various deposition/annealing temperatures in the atomic layer deposition (ALD) process was investigated. The chamber temperature in the ALD process was set to 120 °C, 200 °C, or 250 °C, and the annealing temperature was set to 400 °C, 500 °C, 600 °C, or 700 °C. For the given annealing temperature of 700 °C, the remnant polarization (2Pr) was 17.21 µC/cm2, 26.37 µC/cm2, and 31.8 µC/cm2 at the chamber temperatures of 120 °C, 200 °C, and 250 °C, respectively. For the given/identical annealing temperature, the largest remnant polarization (Pr) was achieved when using the chamber temperature of 250 °C. At a higher annealing temperature, the grain size in the HZO layer becomes smaller, and thereby, it enables to boost up Pr. It was observed that the endurance characteristics for the capacitors fabricated under various annealing/chamber temperatures were quite different. The different endurance characteristics are due to the oxygen and oxygen vacancies in ferroelectric films, which affects the wakeup/fatigue behaviors. However, in common, all the capacitors showed no breakdown for an externally applied pulse (up to 108 cycles of the pulse).