Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor

Hwang

Physica Rapid Research Ltrs

et al. 2021

Owing to their high scalability and superior complementary metal–oxide–semiconductor (CMOS) compatibility, HfO2‐based ferroelectric field‐effect transistors (FeFETs) are proved to be promising candidates for emerging nonvolatile memory devices. However, the poor endurance of these FeFETs, which is attributed to the degradation of the interfacial dielectric layer, is a serious obstacle for commercialization. In FeFETs with a metal–ferroelectric–insulator–semiconductor gate stack, the strong electric field across the interfacial dielectric layer mainly induces charge injection/trapping and limits endurance to <106 cycles. Herein, optimum condition of switching polarization (Pnormals) of ferroelectric materials and a new structural approach to reduce the strength of the electric field across the interfacial dielectric layer and improve memory window (MW) and reliability properties are presented. Based on numerical simulation, it is found that an interfacial electric field increases with Pnormals, and a metal–ferroelectric–metal–insulator–semiconductor FeFET with a 3D channel structure is effective to have high ratio of dielectric capacitance to ferroelectric capacitance, resulting in low electric field through the interfacial layer and large MW.

Section: Introductionmentioning

confidence: 99%

High‐Performance and High‐Endurance HfO₂‐Based Ferroelectric Field‐Effect Transistor Memory with a Spherical Recess Channel

Hwang

Physica Rapid Research Ltrs

et al. 2021

ACS Appl. Mater. Interfaces

“…Simultaneously, due to the insufficient V FE , which suppresses the influence of ferroelectric polarization switching on the subthreshold region, the slope of I DS −V G curves during the forward sweeping becomes smoother, leading to an increased SS. 20,43 In addition, accompanying the increase in HZO capacitance, the V G (V drop ) required for turning off the I DS during reverse sweeping becomes larger, resulting in a decrease in hysteresis (Figure S7b in the Supporting Information). This is caused by the increase in the back-switching field as the capacitance of the ferroelectric capacitor increases (see Section 2 in the Supporting Information).…”

Section: Resultsmentioning

confidence: 99%

Ultralow Subthreshold Swing of a MOSFET Caused by Ferroelectric Polarization Reversal of Hf_0.5Zr_0.5O₂ Thin Films

Wang,

Liu,

Luo

et al. 2023

The emergence of complementary metal−oxide semiconductor (CMOS)-compatible HfO 2 -based ferroelectric materials provides a promising way to achieve ferroelectric field-effect transistors (FeFETs) with a steep subthreshold swing (SS) reduced to below the Boltzmann thermodynamics limit (∼60 mV/dec at room temperature), which has important implications for lowering power consumption. In this work, a metal−oxide-semiconductor field-effect transistor (MOSFET) is connected with Hf 0.5 Zr 0.5 O 2 (HZO)-based ferroelectric capacitors with different capacitances. By adjusting the capacitance of ferroelectric capacitors, an ultralow SS of ∼0.34 mV/dec in HfO 2 -based FeFETs can be achieved. More interestingly, by designing the sweeping voltage sequences, the SS can be adjusted to be 0 mV/dec with the drain current ranging over six orders of magnitude, and the threshold voltage for turning on the MOSFET can be further reduced. The manipulated SS could be attributed to the evolution of ferroelectric switching. Our work contributes to understanding the origin of ultralow SS in ferroelectric MOSFETs and the realization of low-power devices.

“…12 d and e. Through the ALD process, the HZO MPB can be used to create a variety of structures, including MFIS and MFFM. Advanced FinFETs with high-κ exhibit strong electrostatic properties and significant driving current [ 27 , 65 ]. The driving current in the ON state increased by 13% when was raised from 21 to 40.…”

Section: History and Road Map Of Morphotropic Phase Boundary Between ...mentioning

confidence: 99%

A review on morphotropic phase boundary in fluorite-structure hafnia towards DRAM technology

2022

In the present hyper-scaling era, memory technology is advancing owing to the demand for high-performance computing and storage devices. As a result, continuous work on conventional semiconductor-process-compatible ferroelectric memory devices such as ferroelectric field-effect transistors, ferroelectric random-access memory, and dynamic random-access memory (DRAM) cell capacitors is ongoing. To operate high-performance computing devices, high-density, high-speed, and reliable memory devices such as DRAMs are required. Consequently, considerable attention has been devoted to the enhanced high dielectric constant and reduced equivalent oxide thickness (EOT) of DRAM cell capacitors. The advancement of ferroelectric hafnia has enabled the development of various devices, such as ferroelectric memories, piezoelectric sensors, and energy harvesters. Therefore, in this review, we focus the morphotropic phase boundary (MPB) between ferroelectric orthorhombic and tetragonal phases, where we can achieve a high dielectric constant and thereby reduce the EOT. We also present the role of the MPB in perovskite and fluorite structures as well as the history of the MPB phase. We also address the different approaches for achieving the MPB phase in a hafnia material system. Subsequently, we review the critical issues in DRAM technology using hafnia materials. Finally, we present various applications of the hafnia material system near the MPB, such as memory, sensors, and energy harvesters. Graphical Abstract