Abstract-This paper describes the design of a CMOS temperature-to-digital converter (TDC). It operates by measuring the temperature-dependent phase shift of an electrothermal filter (ETF). Compared to previous work, this TDC employs an ETF whose layout has been optimized to minimize the thermal phase spread caused by lithographic inaccuracy. To minimize electrical phase spread, the TDC's front-end consists of a wide bandwidth gain-boosted transconductor. The transconductor's output current is then digitized by a phase-domain 61 modulator whose phase-summing node is realized by a chopper demodulator. To minimize the residual offset caused by the demodulator's switching action, the demodulator is located at the virtual ground nodes established by the transconductor's gain-boosting amplifiers. Measurements on 16 samples (within one batch) show that the TDC has an untrimmed inaccuracy of less than 0.7 C (3 ) over the military range ( 55 C to 125 C).

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Emails. [s.m.kashmiri, s.haddad, w.a.serdUn]@,ewi.tudelft.nl domain transfer function decreased overshoot in the step Abstract-The frequency-domain exponential transfer function of a response, while keeping the other characteristics fixed. delay function cannot be realized with a finite number of lumped This paper has six sections. Section II briefly recapitulates the elements. Therefore an approximation of a rational quotient of mostly used Bessel-Thomson delay-filter approximation method. polynomials has to be used. While the use of Bessel polynomials Pad6 approximation is introduced in section III, and a systemresults in the well-known all-pole Bessel-Thomson approximation, a l Taylor expansion of the exponential transfer function of a delay level overview of the delay-filter performance is investigated in around one point results in another type of rational transfer, known this section. A systematic simulation of both methods using as Pade approximation. Although a Bessel-Thomson approximation MATLABW is illustrated in section IV. The proposed method of results in an overshoot-free step response it has slower response and narrow Gaussian time-domain impulse response is discussed, smaller bandwidth in comparison to a Padc-approximated delay. simulated, and compared to the other two methods in section V. Unfortunately, the latter suffers from overshoot. To reduce the A conclusion of the derived results can be found in section VI. overshoot but preserve the fast-response and large-bandwidth properties, a new delay approximation method is introduced. The method is based on approximation of the delta time-domain II. BESSEL-THOMSON APPROXIMATION response of an ideal delay by a narrow Gaussian time-domain Bessel Thomson is the most widely used approximation method impulse response. The subsequent Pade approximation of the corulseresponding Gaussian trnsferfuenctio ylds approationa f trfer of delay filters. This method leads to a family of low-pass allcorresponding Gaussian transfer function yields a rational transfer pl rnfrfntosTs,wihwudgv prxmtl function that is ready for implementation in an analog fashion and pole transfer functions T(s), which would give approximately realizes a delay with both a large bandwidth and little overshoot. constant time delay over as large frequency range as possible.The resultant transfer functions are of the form [1]:

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a) Figure I. The analog FLL of (I], (a), and the digitally-assisted FLL, (b).(b) '------1 II. SYSTEM-LEVEL DESIGN In Fig. 1a, a simplified block diagram of an analog FLL of [1] is shown. The YCO drives the ETF as well as a synchronous demodulator, which detects the phase of the ETF's output signal. The output of the synchronous demodulator is then integrated by an analog filter, which drives the YCO. The loop locks when the demodulator's DC output is zero, corresponding to a YCO frequency fvco = .190at which the phase shift of the ETF's near-sinusoidal output is about 90°. The FLL's phase-frequency characteristic is thus locked to that of the ETF.A block diagram of the proposed digitally-assisted electrothermal FLL is shown in Fig. 1b. Besides a YCO and an ETF, it consists of a phase domain M: modulator (PDM:M), a DAC, and a digital filter. The YCO drives the ETF, whose phase shift is then digitized by the PDM:M [5,6]. The latter's bitstream output is then compared with a phase reference of 90°, and the resulting error signal is then Hz were achieved with the help of a large (1 IlF) off-chip capacitor. In the digitally-assisted FLL described here, the noise bandwidth is defined by a digital filter, resulting in a solution that is more amenable to CMOS integration.In the next section, the system-level design of a digitallyassisted electrothermal FLL is described. Section III provides an overview of the circuit, while the measurement results are presented in section IY. The paper ends with conclusions.

This paper describes a new method for determining the effective value of the thermal diffusivity, D eff , of a CMOS chip. D eff is a parameter that describes the rate at which heat diffuses through a chip, and hence its knowledge is essential for the thermal management of systems on chip and the design of thermal sensors. By embedding an electrothermal filter (ETF) in a frequency-locked-loop (FLL), its phase response, which is determined by its (fixed) geometry and D eff , can be measured. D eff can then be accurately determined from the measured phase response. For an ETF implemented in a 0.7μm CMOS process, the resulting values of D eff were 1.405, 0.755, and 0.495 cm 2 /s at -55, 27, and 125 ºC respectively.