This paper describes the design of a low power, energy-efficient CMOS smart temperature sensor intended for RFID temperature sensing. The BJT-based sensor employs an energy-efficient 2 nd-order zoom ADC, which combines a coarse 5-bit SAR conversion with a fine 10-bit Σ∆ conversion. Moreover, a new integration scheme is proposed that halves the conversion time, while requiring no extra supply current. To meet the stringent cost constraints on RFID tags, a fast voltage calibration technique is used, which can be carried out in only 200msec. After batch calibration and an individual room-temperature calibration, the sensor achieves an inaccuracy of ±0.15°C (3σ) from-55°C to 125°C. Over the same range, devices from a second lot achieved an inaccuracy of ±0.25°C (3σ) in both ceramic and plastic packages. The sensor occupies 0.08mm 2 in a 0.16μm CMOS process, draws 3.4μA from a 1.5V to 2V supply, and achieves a resolution of 20mK in a conversion time of 5.3msec. This corresponds to a minimum energy dissipation of 27nJ per conversion.

A 20-bit incremental ADC for battery-powered sensor applications is presented. It is based on an energy-efficient zoom ADC architecture, which employs a coarse 6-bit SAR conversion followed by a fine 15-bit ΔΣ conversion. To further improve its energy efficiency, the ADC employs integrators based on cascoded dynamic inverters for extra gain and PVT tolerance. Dynamic error correction techniques such as auto-zeroing, chopping and dynamic element matching are used to achieve both low offset and high linearity. Measurements show that the ADC achieves 20-bit resolution, 6ppm INL and 1μV offset in a conversion time of 40ms, while drawing only 3.5μA current from a 1.8V supply. This corresponds to a state-ofthe-art figure-of-merit (FoM) of 182.7dB. The 0.35mm 2 chip was fabricated in a standard 0.16μm CMOS process. Index Terms-A/D conversion, battery-powered sensors, low power circuits, incremental ADC, zoom ADC, SAR ADC, delta-sigma ADC, inverter-based integrator, and dynamic error correction techniques. 2 / 31 JSSC Chae et al, A 6.3W 20bit Incremental Zoom-ADC with 6ppm INL and 1V Offset 17 / 31 JSSC Chae et al, state-of-the art. VI. CONCLUSION A 20-bit incremental analog-to-digital converter has been realized in a 0.16μm CMOS technology. The prototype ADC achieves 20-bit resolution, 6ppm INL and 1μV offset in a conversion time of 40ms, while dissipating only 3.5μA current from 1.8V supply. This performance is achieved by using a zoom ADC architecture, a novel inverter-based integrator and various dynamic error correction techniques. This work achieves the state-of-the-art FoM of 182.7dB, which is the highest reported FoM for incremental ADCs published to date.

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This paper describes an all-CMOS temperature sensor intended for RFID applications that achieves both sub-1V operation and high accuracy (±0.4°C) over a wide temperature range (-40 to 125°C). It is also an ultra-low-power design: drawing 700nA from a 0.85V supply. This is achieved by the use of dynamic threshold MOSTs (DTMOSTs) as temperature-sensing devices, which are then read out by an inverter-based 2 nd -order zoom ADC. Circuit errors are mitigated by the use of dynamic error-correction techniques, while DTMOST spread is reduced by a single room temperature (RT) trim. The latter feature constitutes a significant advance over previous all-CMOS designs [5,6], which require two-point trimming to approach the same level of accuracy.In most CMOS processes, a diode-connected DTMOST can be readily realized by connecting the gate, bulk and drain of a standard PMOST together (Fig. 12.7.1). The resulting device approximates an ideal diode, with an extrapolated gate-source voltage V GS ~ 0.6V at 0K and a linear temperature coefficient of about -1mV/°C [2]. Connecting the gate to the bulk reduces the influence of gate-oxide thickness on the resulting dynamic threshold voltage, and thus the V GS spread of a DTMOST is significantly less than that of a normal PMOST [1,2]. Diodeconnected DTMOSTs can thus be used to replace the BJTs of a conventional band-gap voltage reference [2] or temperature sensor [1]. However, since the magnitude of V GS (~ 0.3V at RT) is only about half that of a BJT's base-emitter voltage V BE (~ 0.6V at RT), the resulting circuit can be operated at supply voltages below 1V over a wide temperature range, e.g., from -40 to 125°C.The sensor's front-end is shown in Fig. 12.7.1. A pair of DTMOSTs with a 1:2 area ratio that are biased by identical currents I=90nA (at RT). The same currents also power a so-called current-voltage mirror (CVM) [3], which forces a proportional-to-absolute-temperature (PTAT) voltage ΔV GS across a resistor. As a result, the biasing currents will also have a well-defined PTAT dependency. To minimize the effect of DTMOST mismatch, which would otherwise impact the accuracy of ΔV GS , the 1:2 area ratio is established by incorporating three unit DTMOSTs into a dynamic element matching (DEM) scheme. Since the associated DEM switches carry bias current, Kelvin connections are used to accurately read out V GS and ΔV GS . Another source of error is the CVM's offset and 1/f noise, which add directly to ΔV GS and thus impact the accuracy of the bias currents, and hence of both V GS and ΔV GS . Such errors are mitigated by chopping the CVM (Fig. 12.7.1).The sensor's block diagram is shown in Fig. 12.7.2. It consists of the DTMOST front-end, a 2 nd -order incremental zoom ADC, a voltage doubler and some control logic. As in [4], the zoom ADC uses a power-efficient coarse/fine algorithm to convert the front-end's output voltages V GS and ΔV GS into a temperaturedependent ratio X = V GS /ΔV GS . In this design, X varies from 5 to 28 over the temperature range -40 to 125°C. An off-chip digit...