A Temperature-to-Digital Converter Based on an Optimized Electrothermal Filter

Abstract

Abstract-This paper describes the design of a CMOS temperature-to-digital converter (TDC). It operates by measuring the temperature-dependent phase shift of an electrothermal filter (ETF). Compared to previous work, this TDC employs an ETF whose layout has been optimized to minimize the thermal phase spread caused by lithographic inaccuracy. To minimize electrical phase spread, the TDC's front-end consists of a wide bandwidth gain-boosted transconductor. The transconductor's output current is then digitized by a phase-domain 61 modulator whose phase-summing node is realized by a chopper demodulator. To minimize the residual offset caused by the demodulator's switching action, the demodulator is located at the virtual ground nodes established by the transconductor's gain-boosting amplifiers. Measurements on 16 samples (within one batch) show that the TDC has an untrimmed inaccuracy of less than 0.7 C (3 ) over the military range ( 55 C to 125 C).

Capacitively Coupled Chopper Amplifiers

“…Four of these will be discussed here, they are: a switched-capacitor (SC) notch filter [7][8]; an AC-coupled ripple reduction loop (RRL) [11]; an auto-correction loop [10]; a digitally-assist RRL [12] and the combination of chopping and auto-zeroing [16][17]. These techniques will be discussed in the following sections.…”

“…2-6 is dependent on its input and feedback transconductor mismatch and the accuracy of the resistor bridge. The transconductor mismatch usually has a strong dependence on the input and output CM voltage difference of the IA [10], which means that without special precautions, the gain accuracy will be Hmited to about 0.5% in the presence of large input and output CM differences [11].…”

“…,.V,_.xC,^ C, (6)(7)(8)(9)(10)(11)(12)(13) where Vogsetj) is the offset of the boosters. Cp_cas is the total parasitic capacitance at the In total, the RRL consumes less than 6|iA, whereas the CB consumes 4|jA, and G"4 consumes IpA.…”

“…G= ^ , (7)(8)(9)(10)(11) where Ao is the DC open-loop gain of the CCIA, and G is the closed-loop gain of the CCIA.…”

A Chopper Current-Feedback Instrumentation Amplifier With a 1 mHz <formula formulatype="inline"><tex Notation="TeX">$1/f$</tex> </formula> Noise Corner and an AC-Coupled Ripple Reduction Loop

“…To reduce this, the position of the chopper was modified [ Fig. 13(b)] so that these drain capacitances are located at the virtual grounds established by the gain-boosting amplifiers [19]. Now the offset of appears as a square wave at nodes 1 and 2 [ Fig.…”