Thermally stable, high-quality ultrathin (EOT = 13 A) CVD HfAlO gate dielectrics with poly-Si gate electrode have been investigated for the first time. Results demonstrate that while in situ doping with Al significantly increases the crystallization temperature of HfO 2 up to 900 C and improves its thermal stability, it also introduces negative fixed oxide charges due to Al accumulation at the HfAlO-Si interface, resulting in mobility degradation. The effects of Al concentration on crystallization temperature, fixed oxide charge density, and mobility degradation in HfAlO have been characterized and correlated.

We report the process module development results and device characteristics of dual metal gate CMOS with TaSiN and Ru gate electrodes on HfO 2 gate dielectric. The wet etch of TaSiN had a minimal impact on HfO 2 (∆EOT<1Å). A plasma etch process has been developed to etch Ru/TaN/Poly (PMOS) and TaSiN/Ru/TaN/Poly (NMOS) gate stacks simultaneously. Well behaved dual metal gate CMOS transistors have been demonstrated with L g down to 85nm.

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The process module development and device characteristics of dual metal gate complementary metal-oxide-semiconductor ͑CMOS͒ with TaSiN and Ru gate electrodes on HfO 2 dielectric are reported. Highly selective wet etch processes for various metal gate materials ͑TaSiN, TiN, and TaN͒ have been developed with a minimal impact on HfO 2 and HfSiON. A plasma etch process is developed to etch TaSiN and Ru dual metal gate stacks simultaneously on the same wafer. Well behaved dual metal gate CMOS transistors with gate length down to 85 nm have been demonstrated. This integration method is highly versatile and can be applied to various metal gate materials.

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