A selective wet etching process for fabricating SiGe and Ge nanowires for gate all around transistors is introduced in this paper. Two formulated proprietary chemical mixtures with highly selective etching properties (Si vs. SiGe and SiGe vs. Ge) can effectively dissolve the sacrificial layers with minimal damage to the interstitial nanowire materials. The Auger Electron Spectroscopy (AES) surface characterization indicates that no chemical contamination is left after the wet etching process.

Gate All-Around (GAA) is considered a key design feature for future CMOS technology. SiGe vs. Si selective etch is required for Si nanowire formation in GAA. It is confirmed the selective SiGe removal with commodity chemical (mixtures of hydrofluoric acid (HF), hydrogen peroxide (H2O2) and acetic acid (CH3COOH, HAc)), however the thick oxidized layer on Si NW was observed after commodity chemical process, which is indicated the significant Si NW loss. On the other hand, the formulated mixture ACT® SG-101, which is focusing on SiGe oxidizer, chemical pH, solvent polarity & corrosion inhibitor for chemical concept, was performed higher selectivity and lower Si loss than commodity chemical. The formulated mixture has also been used to form an inner spacer for cavity etch scheme and confirmed uniform cavity etch and inner spacer filling on topological test structure.

SUMMARY Analysis precision of boost ratio and power efficiency in boost DC–DC converter circuit is improved by proposing adaptive equivalent circuit of output diode of the circuit. In experiment, boost ratio and power efficiency in high boost ratio circuit were 9.89% and 76.5% respectively with its load resistance of 20 Ω driven by output voltage 10 V. In experimental results, error in theoretical values of boost ratio compared with the measured values of that was reduced to −3.79% from 57.5% in the conventional circuit. In a tapped‐inductor high boost ratio circuit, error in theoretical values of boost ratio was reduced to 3.54% from 31.8%. Error in theoretical values of power efficiency with the measured values of that was reduced to 5.51% from 33.2% in the conventional circuit. In a high boost ratio circuit, error in theoretical values of power efficiency was reduced to −3.32% from 17.3%. Power loss of every element in boost DC–DC converter circuits was analyzed with high precision by analysis of inductance current waveforms in those circuits. Error in theoretical values of power loss compared with measured values was reduced to equal or less than 5%.

SUMMARY Conventionally Peltier device has been controlled precisely by pulse driving current. In this study, it is shown that driving Peltier device by dc current controlled by pulse signal increases coefficient of performance (COP) of cooling system with reducing self‐heating in the device keeping accurate controlling. In practical application, the dc current driving can be achieved easily by connecting one electric condenser with large capacitance to the Peltier device in parallel. In results of analysis for electric circuit, the dc driving current reduced the self‐heating in the Peltier device to conventional calorific power multiplied by driving duty‐cycle value. Heat absorption rate in the Peltier device was increased by half of the reduction in the self‐heating. Furthermore, new thermal equivalent circuit of Peltier device with considering Seebeck effect is proposed to analyze COP accurately in this paper. It also analyzed COP of system driven by each current by using proposed thermal equivalent circuit. In result of experiment, it was possible to confirm that COP in cooling system using the dc driving current was increased than conventional system. In particular, the COP increased to equal or more than 2.01 times in less than 50% of driving duty cycle.

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