For better area and power efficiencies, rail-to-railoutput single-stage amplifiers are a potential replacement of their multi-stage counterparts, especially for display applications that entail massive buffer amplifiers in their column drivers. This paper describes a nested-current-mirror (NCM) technique for a single-stage amplifier to achieve substantial enhancements of DC gain, gain-bandwidth product (GBW) and slew rate (SR). Specifically, NCM is customizable for different mirror steps, and sub mirror ratios, to balance the performance metrics and capacitive-load ( ) drivability, avoiding any compensation passives while preserving a rail-to-rail output swing. Analytical treatments of the NCM technique in terms of performance limits and robustness reveal that the NCM amplifier can surpass the fundamental power-efficiency limit set by the basic differential-pair (DP) amplifier. Two prototypes, 3-step and 4-step NCM amplifiers, were fabricated in 0.18 m CMOS for systematic comparison with the DP amplifier. The former represents a robust design exhibiting 72 dB DC gain and 0.0028-0.27 MHz GBW over 0.15-15 nF with 80 phase margin (PM). The latter embodies an aggressive design attaining 84 dB DC gain and 0.013-1.24 MHz GBW over 0.15-15 nF with 62 PM. All amplifiers were sized for the same area (0.0013 mm ) and power (3.6 W).Index Terms-Area efficiency, CMOS, current mirror, DC gain, differential-pair (DP) amplifier, frequency compensation, gain-bandwidth product (GBW), low temperature polysilicon LCD, multi-stage amplifier, nested current mirror, rail-to-rail output swing, single-stage amplifier, slew rate (SR), stability.
This paper presents a reconfigurable, low offset, low noise and high speed dynamic clocked-comparator for medium to high resolution Analog to Digital Converters (ADCs). The proposed comparator reduces the input referred noise by half and shows a better output driving capability when compared with the previous work. The offset, noise and power consumption can be controlled by a clock delay which allows simple reconfiguration. Moreover, the proposed offset calibration technique improves the offset voltage from 11.6mV to 533µV at 1 sigma. A prototype of the comparator is implemented in 90nm 1P8M CMOS with experimental results showing 320µV input referred noise at 1.5GHz with 1.2V supply.
Precision Medicine in Oncology requires tailoring of therapeutic strategies to individual cancer patients. Due to the limited quantity of tumor samples, this proves to be difficult, especially for early stage cancer patients whose tumors are small. In this study, we exploited a 2.4 × 2.4 centimeters polydimethylsiloxane (PDMS) based microfluidic chip which employed droplet microfluidics to conduct drug screens against suspended and adherent cancer cell lines, as well as cells dissociated from primary tumor of human patients. Single cells were dispersed in aqueous droplets and imaged within 24 hours of drug treatment to assess cell viability by ethidium homodimer 1 staining. Our results showed that 5 conditions could be screened for every 80,000 cells in one channel on our chip under current circumstances. Additionally, screening conditions have been adapted to both suspended and adherent cancer cells, giving versatility to potentially all types of cancers. Hence, this study provides a powerful tool for rapid, low-input drug screening of primary cancers within 24 hours after tumor resection from cancer patients. This paves the way for further technological advancement to cutting down sample size and increasing drug screening throughput in advent to personalized cancer therapy.
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