This paper deals with the analysis of performance of Canny and Laplacian of Gaussian filter in edge detection of retinal images. Edge detection is one of the methods in image segmentation in Image Processing. Classical methods of edge detection involve convolving the image with an operator (a 2-D filter), which is constructed to be geometry of the operator which determines a characteristic direction in which it is most sensitive to edges. It is important to have efficient edge detection technique. In this paper, comparative analysis of the aforesaid filters is done and found that Canny edge operator performs better than Laplacian of Gaussian filter in most of the varieties of retinal images under various conditions. Here in this paper, we pertain only with human retinal images under diverse conditions. We have shown healthy retina, retina blood vessels, disease affected retina, optic disc etc.
This paper proposes the design of high speed Vedic Multiplier using the compressor which is based on ancient Indian Vedic mathematics that has improved the performance of multiplier. As the technology advent the Multiplier require high speed , low power and small area. Vedic mathematics, a system of ancient Indian mathematics, which has a unique technique of solutions based on only 16 sutras. In this paper we introduce a new architecture of Vedic multiplier by using 4:2 compressors and 7:2 compressors for addition that increase the speed of Multiplier and reduce the area 2% than Urdhwa-Tiryakbhyam Multiplier. The 7:2 compressors are made of 5:2 compressors and two full adders. The design was performed on a Xilinx Spartan 3 series of FPGA and the timing and area of the design, on the same have been calculated.
The aim of this work is to present a two-dimensional analysis for different gate stack dielectric structured n-MOSFETs with carrier quantization effects. The model is developed using Green's function for solving Poisson's equation, without implying the extensive effort required for a fully self-consistent solution of the Schrödinger and Poisson equations. Explicit results for potential distribution, threshold voltage and drain current, with different structural and bias parameters, have been presented, typical in the operation of modern devices. The model includes short channel, drain bias, and junction curvature effects. Based on extensive simulation and developed formulation, it is found that the conventional concept of a scaled transformation method for gate stack structures to replace silicon-dioxide (SiO 2) dielectric thickness with a thicker high dielectric does not predict the same characteristics. It has also been shown that using double-layer gate stack structures with low-k dielectric as the spacer material can well confine the electric fields within the channel, thereby enhancing gate controllability on the channel charge. Comparison of the results thus obtained is done with simulated results to justify the analysis.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.