Three new tailor-made molecules (DPDCTB, DPDCPB, and DTDCPB) were strategically designed and convergently synthesized as donor materials for small-molecule organic solar cells. These compounds possess a donor-acceptor-acceptor molecular architecture, in which various electron-donating moieties are connected to an electron-withdrawing dicyanovinylene moiety through another electron-accepting 2,1,3-benzothiadiazole block. The molecular structures and crystal packings of DTDCPB and the previously reported DTDCTB were characterized by single-crystal X-ray crystallography. Photophysical and electrochemical properties as well as energy levels of this series of donor molecules were thoroughly investigated, affording clear structure-property relationships. By delicate manipulation of the trade-off between the photovoltage and the photocurrent via molecular structure engineering together with device optimizations, which included fine-tuning the layer thicknesses and the donor:acceptor blended ratio in the bulk heterojunction layer, vacuum-deposited hybrid planar-mixed heterojunction devices utilizing DTDCPB as the donor and C(70) as the acceptor showed the best performance with a power conversion efficiency (PCE) of 6.6 ± 0.2% (the highest PCE of 6.8%), along with an open-circuit voltage (V(oc)) of 0.93 ± 0.02 V, a short-circuit current density (J(sc)) of 13.48 ± 0.27 mA/cm(2), and a fill factor (FF) of 0.53 ± 0.02, under 1 sun (100 mW/cm(2)) AM 1.5G simulated solar illumination.

As technology continues to shrink, reducing leakage is critical to achieving energy efficiency. Previous studies on low-power GPUs (Graphics Processing Units) focused on techniques for dynamic power reduction, such as DVFS (Dynamic Voltage and Frequency Scaling) and clock gating. In this paper, we explore the potential of adopting architecture-level power gating techniques for leakage reduction on GPUs. We propose three strategies for applying power gating on different modules in GPUs. The Predictive Shader Shutdown technique exploits workload variation across frames to eliminate leakage in shader clusters. Deferred Geometry Pipeline seeks to minimize leakage in fixed-function geometry units by utilizing an imbalance between geometry and fragment computation across batches. Finally, the simple time-out power gating method is applied to nonshader execution units to exploit a finer granularity of the idle time. Our results indicate that Predictive Shader Shutdown eliminates up to 60% of the leakage in shader clusters, Deferred Geometry Pipeline removes up to 57% of the leakage in the fixed-function geometry units, and the simple time-out power gating mechanism eliminates 83.3% of the leakage in nonshader execution units on average. All three schemes incur negligible performance degradation, less than 1%.

Shared last-level cache (LLC) management is a critical design issue for heterogeneous multi-cores. In this paper, we observe two major challenges: the contribution of LLC latency to overall performance varies among applications/cores and also across time; overlooking the off-chip latency factor often leads to adverse effects on overall performance. Hence, we propose a Latency Sensitivity-based Cache Partitioning (LSP) framework, including a lightweight runtime mechanism to quantify the latency-sensitivity and a new cost function to guide the LLC partitioning. Results show that LSP improves the overall throughput by 8% on average (27% at most), compared with the state-of-the-art partitioning mechanism, TAP.

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