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An electrostatically controlled flexible mirror has been fabricated on a silicon chip by means of bulk micromachining. The mirror has a 10.5 mm × 10.5 mm square aperture and consists of a 0.5-µm-thick tensile-stressed silicon-nitride diaphragm coated with a 0.2-µm-thick reflective aluminum layer. The reflecting surface is initially plane with a mean-square deviation of ~λ/8 for λ = 633 nm. The shape of the reflecting surface is controlled electrostatically by an array of integrated actuators. Good initial optical quality and the possibility of electrostatic control of the reflecting surface make the on-chip mirror useful for various electro-optical applications.

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The crystal structure of graphene flakes is expected to significantly affect their sensing properties. Here we report an experimental investigation on the crystalline structure of graphene aimed at exploring the effects on the gas sensing properties. The morphology of graphene, prepared via Chemical Vapor Deposition (CVD), Liquid Phase Exfoliation (LPE) and Mechanical Exfoliation (ME), is inspected through Raman spectroscopy, Atomic Force Microscopy (AFM) and Scanning Electron Microscopy (SEM). CVD and LPE-graphene structures are found to be more defective with respect to ME-graphene. The defects are due to the jagged morphology of the films rather than originating from intrinsic disorder. The flatness of ME-graphene flakes, instead, explains the absence of defects. Chemiresistors based on the three different graphene preparation methods are subsequently exposed to NO in the concentration range 0.1-1.5 ppm (parts per million). The device performance is demonstrated to be strongly and unambiguously affected by the material structure: the less defective the material is, the higher the response rate is. In terms of signal variation, at 1.5 ppm, for instance, ME-graphene shows the highest value (5%) among the three materials. This study, comparing simultaneously graphene and sensors prepared via different routes, provides the first experimental evidence of the role played by the graphene level of defectiveness in the interaction with analytes. Moreover, these findings can pave the path for tailoring the sensor behavior as a function of graphene morphology.

In this paper, a new method of photoresist coating, direct spray coating, is studied. This method is especially suited to coat high topography surfaces for some special applications in microelectromechanical systems, radio frequency components and packaging. The most suitable photoresist type and coating process are found. The influence of several coating parameters on the thickness and uniformity of the photoresist layer is investigated. A model describing the dependence of the thickness on the major parameters is presented. Very promising results are obtained using spray coating for the fabrication of several three-dimensional structures.

Through-wafer electrical connections are becoming increasingly important for three-dimensional integrated circuits, microelectromechanical systems packaging and radio-frequency components. In this paper, we report our current results on the formation of through-wafer metal plugs using the copper electroplating technique. Several approaches for via filling are investigated, such as filling before or after wafer thinning. Among the methods experimented, the one-side Cu plating and bottom-up filling appears to be the most suitable technique for copper filling into high aspect ratio vias. Using this method, we demonstrate the successful filling of vias with an aspect ratio of up to 7. Copper plugs as small as 20 × 20 μm2 are obtained uniformly over 4 inch Si wafers.

We present a low-temperature post-processing module, utilizing polyimide as a sacrificial layer and novel materials such as PECVD SiC and metals (sputtered aluminium and titanium) as structural layers. The use of spin-on polyimide allows an all-dry final release step overcoming stiction problems often encountered in wet sacrificial etching processes. The spinning and curing procedure has been tailored to the specific needs of the IC-compatible post-process module. For the patterning of the polyimide, thin films of aluminium, PECVD silicon oxide or silicon carbide are employed as a mask layer. Anisotropic etching of the mask film and of the polyimide layer is accomplished by RIE. After patterning the structural layer, sacrificial etching of the polyimide is done using an isotropic dry etch process in high-density oxygen plasma. An underetch rate of 4 μm min−1 is achieved. Compatibility with different structural materials is tested and test structures are designed and realized in a fully post-processing surface micromachining module.