This paper presents an analysis of the temperature influence on the generation lifetime determination using drain-current transients in floating body partially depleted silicon-insulator n-type metal-oxide-semiconductor field effect transistors fabricated in a 0.13-m SOI complementary metal-oxide semiconductor technology. The device parameters used to calculate the generation lifetime are studied as a function of the temperature from 20 to 80°C. A sensitivity analysis is done as a function of the gate oxide thickness and silicon film concentration, and the influence on the generation lifetime determination is studied. A simple model to estimate the generation lifetime is proposed. The model is experimentally applied and a good agreement is obtained. All the work is supported by two-dimensional numerical simulation.

This paper investigates the impact of the presence of a HALO implanted region on the lifetime analysis, based on a study of drain current switch-off transients. The latter were experimentally determined and compared with two-dimensional numerical simulations for PD SOI nMOSFET devices fabricated in a 0.13 µm CMOS technology. This study investigated for different channel lengths the drain current transient in relation with devices parameters such as the body potential, threshold voltage and the current density in the source/drain junctions.In the HALO devices the hole current density through the junctions between source/drain and body were not very significant, so that the influence of the junction is only due to the capacitive coupling between source/body and drain/body channel. For the channel length range studied (from 10 to 0.2µm), the transient time of HALO devices suffers from a 56% reduction. However, in the no HALO devices, there is beyond the capacitive coupling also a significant increase in the hole current density, causing a transient time reduction of 74%, for the same channel length range.

Since the use of pseudo-resistors became popular in of bio-amplifiers research, several works have been published, but a lack of knowledge about accurate experimental characterisation and simulation of these non-linear devices remains. An innovative experimental procedure concerning the characterisation of pseudo-resistors is presented. The proposed experimental procedure proves the existence of a linear operation region, where the device can operate like a very high resistance, which is mainly applied on bio-amplifier designs. The main experimental results of the electrical characterisation of pseudo-resistors are described in detail and compared with the SPICE results. The pseudo-resistor experimental curve response including the non-linear operation region is presented. Finally, a new non-linear polynomial resistor model to use in SPICE simulator, replacing with success the electrical representation model based on transistors models is proposed. The presented simulations were performed with Mentor Graphics Eldo TM SPICE simulator, using BSIM3V3.1 and PSP103.1 models. The MOSIS Educational Program fabricated the samples used in this work.

An improvement of the one-dimensional analytical model for the extraction of the generation lifetime in partially depleted SOI nMOSFETs is proposed. This refined technique, based on the drain current switch-off transient, considers the influence of the halo implanted region and the channel length reduction. The results obtained are compared with measurements and two- dimensional numerical simulations, showing a good agreement. The improved model can be applied as a simple tool for the electrical characterization of short channel devices.

This work presents a new fast model, based on piecewise linear (PWL) methodology, for pseudo-resistors SPICE simulation, including the non-linear working range, fully supported by experimental data. SPICE simulations with fixed resistances or transistor modelled as pseudoresistors do not reproduce simultaneously its real behavior for both the linear and the non-linear regions. A complete set of steps which validate the PWL macromodel for bio-amplifiers project is presented. As a case study, this paper addresses the pseudo-resistor characteristics operating in the non-linear region when implemented in a low-frequency bio-potential amplifier with narrow bandwidth, for use in heart rate meters and QRS complex monitoring systems. The use of the pseudo-resistor in this low-voltage low-power topology associates DC offset cancellation with an adequate frequency response. Moreover, this work shows that the non-linear characteristics of these devices can be used for a significant reduction in bio-amplifier recovery time (a.k.a. settling time) without any additional device or mechanism, making the heart rate measurements steadier and more reliable than obtained so far in current systems. The transient recovery time, as well as the response to QRS complex, was widely evaluated through experimental measurements and SPICE simulations, thanks to the proposed model. The bio-potential amplifier design was implemented using GF 8HP 0.13 μm BiCMOS technology from Global Foundries. Keywords: piecewise linear macro-model, MOS bipolar pseudo-resistor, pseudo-resistor, small recovery time, bio-potential amplifier, low power design

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