A method to extract the pinned photodiode (PPD) physical parameters inside a CMOS image sensor pixel array is presented. The proposed technique is based on the Tan et al. pinning voltage characteristic. This pixel device characterization can be performed directly at the solid-state circuit output without the need of any external test structure. The presented study analyzes the different injection mechanisms involved in the different regimes of the characteristic. It is demonstrated that in addition to the pinning voltage, this fast measurement can be used to retrieve the PPD capacitance, the pixel equilibrium full well capacity, and both the transfer gate threshold voltage and its channel potential at a given gate voltage. An alternative approach is also proposed to extract an objective pinning voltage value from this measurement.

International audienceSeveral Pinned Photodiode (PPD) CMOS Image Sensors (CIS) are designed, manufactured, characterized and exposed biased to ionizing radiation up to 10 kGy(SiO$_2$ ). In addition to the usually reported dark current increase and quantum efficiency drop at short wavelengths, several original radiation effects are shown: an increase of the pinning voltage, a decrease of the buried photodiode full well capacity, a large change in charge transfer efficiency, the creation of a large number of Total Ionizing Dose (TID) induced Dark Current Random Telegraph Signal (DC-RTS) centers active in the photodiode (even when the Transfer Gate (TG) is accumulated) and the complete depletion of the Pre-Metal Dielectric (PMD) interface at the highest TID leading to a large dark current and the loss of control of the TG on the dark current. The proposed mechanisms at the origin of these degradations are discussed. It is also demonstrated that biasing (i.e., operating) the PPD CIS during irradiation does not enhance the degradations compared to sensors grounded during irradiation

International audienceThis letter presents a simple analytical model for the evaluation of the full well capacity (FWC) of pinned photodiode (PPD) CMOS image sensors depending on the operating conditions and on the pixel parameters. While in the literature and technical documentations FWC values are generally presented as fixed values independent of the operating conditions, this letter demonstrates that the PPD charge handling capability is strongly dependent on the photon flux

International audienceA Radiation Hard CMOS Active Pixel Image Sensor has been designed, manufactured and exposed to X and 60Co γ-ray sources up to several MGy of Total Ionizing Dose (TID). It is demonstrated that a Radiation-Hardened-By-Design (RHBD) CMOS Image Sensor (CIS) can still provide useful images after 10 MGy(SiO2) (i.e. 1 Grad). This paper also presents the first detailed characterizations of CIS opto-electrical performances (i.e. dark current, quantum efficiency, gain, noise, transfer functions, etc.) in the MGy range. These results show that it is possible to design a CIS with good performances even after having absorbed several MGy. Four different RHBD photodiode designs are compared: a standard photodiode design, two well known RHBD layouts and a proposed improvement of the gated photodiode design. The proposed layout exhibits the best performances over the entire studied TID range and further optimizations are discussed. Several original MGy radiation effects are presented and discussed at the device and circuit levels and mitigation techniques are proposed to improve further the radiation hardness of future Rad-Hard CIS developments for extreme TID applications (e.g. for nuclear power plant monitoring/dismantling, experimental reactors (e.g. ITER) or next generation particle physics experiments (e.g. CERN))

International audienceThe Total Ionizing Dose (TID) hardness of digital color Camera-on-a-Chip (CoC) building blocks is explored in the Multi-MGy range using 60Co gamma-ray irradiations. The performances of the following CoC subcomponents are studied: radiation hardened (RH) pixel and photodiode designs, RH readout chain, Color Filter Arrays (CFA) and column RH Analog-to-Digital Converters (ADC). Several radiation hardness improvements are reported (on the readout chain and on dark current). CFAs and ADCs degradations appear to be very weak at the maximum TID of 6 MGy(SiO2), 600 Mrad. In the end, this study demonstrates the feasibility of a MGy rad-hard CMOS color digital camera-on-a-chip, illustrated by a color image captured after 6 MGy(SiO2) with no obvious degradation. An original dark current reduction mechanism in irradiated CMOS Image Sensors is also reported and discussed

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International audienceThis paper presents an investigation of Total Ionizing Dose (TID) induced dark current sources in Pinned PhotoDiodes (PPD) CMOS Image Sensors based on pixel design variations. The influence of several layout parameters is studied. Only one parameter is changed at a time enabling the direct evaluation of its contribution to the observed device degradation. By this approach, the origin of radiation induced dark current in PPD is localized on the pixel layout. The PPD peripheral shallow trench isolation does not seem to play a role in the degradation. The PPD area and a transfer gate contribution independent of the pixel dimensions appear to be the main sources of the TID induced dark current increase. This study also demonstrates that applying a negative voltage on the transfer gate during integration strongly reduces the radiation induced dark current

The effects of Cobalt 60 gamma-ray irradiation on pinned photodiode (PPD) CMOS image sensors (CIS) are investigated by comparing the total ionizing dose (TID) response of several transfer gate (TG) and PPD designs manufactured using a 180 nm CIS process. The TID induced variations of charge transfer efficiency (CTE), pinning voltage, equilibrium full well capacity (EFWC), full well capacity (FWC) and dark current measured on the different pixel designs lead to the conclusion that only three degradation sources are responsible for all the observed radiation effects: the pre-metal dielectric (PMD) positive trapped charge, the TG sidewall spacer positive trapped charge and, with less influence, the TG channel shallow trench isolation (STI) trapped charge. The different FWC evolutions with TID presented here are in very good agreement with a recently proposed analytical model. This work also demonstrates that the peripheral STI is not responsible for the observed degradations and thus that the enclosed layout TG design does not improve the radiation hardness of PPD CIS. The results of this study also lead to the conclusion that the TG OFF voltage bias during irradiation has no influence on the radiation effects. Alternative design and process solutions to improve the radiation hardness of PPD CIS are discussed.