Radiation Hardening of Digital Color CMOS Camera-on-a-Chip Building Blocks for Multi-MGy Total Ionizing Dose Environments

Abstract

International audienceThe Total Ionizing Dose (TID) hardness of digital color Camera-on-a-Chip (CoC) building blocks is explored in the Multi-MGy range using 60Co gamma-ray irradiations. The performances of the following CoC subcomponents are studied: radiation hardened (RH) pixel and photodiode designs, RH readout chain, Color Filter Arrays (CFA) and column RH Analog-to-Digital Converters (ADC). Several radiation hardness improvements are reported (on the readout chain and on dark current). CFAs and ADCs degradations appear to be very weak at the maximum TID of 6 MGy(SiO2), 600 Mrad. In the end, this study demonstrates the feasibility of a MGy rad-hard CMOS color digital camera-on-a-chip, illustrated by a color image captured after 6 MGy(SiO2) with no obvious degradation. An original dark current reduction mechanism in irradiated CMOS Image Sensors is also reported and discussed

Total Ionizing Dose Effects on a Radiation-Hardened CMOS Image Sensor Demonstrator for ITER Remote Handling

“…The illumination system power and the sensor integration time will be tuned to achieve the sensitivity required by the application at the camera level. It is worth noting that the final Large voltage shifts in RHBD CIS analog readout chain due to 3.3V ELT P-MOSFETs 2 mitigation techniques proposed [2] Only use 1.8V ELT N&P-MOSFETs [3] Only use ELT N-MOSFETs (3.3V) (this work) Figure 1. Overview of the explored radiation hardening approaches for the CIS analog readout chain.…”

“…Previous work has demonstrated that reaching a 10 MGy (1 Grad) radiation hardness with a CMOS Image Sensor (CIS) is feasible [2], [3]. In order to confirm this conclusion and to demonstrate that a full camera can also be made radiation hard up to several Mega-gray, the FUsion for energy Radiation Hard Image sensor (FURHI) and Imaging System (FURHIS) demonstrators have been developed.…”

“…The radiation hardness of a more integrated camera-on-a-chip with an on-chip sequencer and Analog-to-Digital Converters (ADC) will be studied in a next step. However, the results previously obtained on digital circuits and ADC test structures [3] on the same technology suggest that reaching the required radiation hardness for the full camera-on-a-chip is possible. The FURHI CIS demonstrator was manufactured using a 180 nm CIS process with dedicated photodiode profiles and optimized in-pixel devices using a Multi Project Wafer (MPW) access managed by imec-europractice.…”

“…The whole circuit is radiation-hardened-by-design [6], especially by using enclosed geometries (Enclosed Layout Transistors (ELT) [7]) for all N and P MOSFETs (1.8 V and 3.3 V ones) to mitigate Radiation Induced Narrow Channel Effect (RINCE) [8], sidewall leakages and junction leakages. In previous explorations [2], [3], it appeared that 3.3 V P channel transistors were too sensitive to TID to be used beyond 100 kGy because of large gate oxide trapped charge induced threshold voltage shifts (∆V ot ). On the other hand 3.3 V N-channel transistors did not exhibit any ∆V ot after several MGy and their threshold voltage was only influenced by a limited interface state induced shift (∆V it ) [2].…”

“…• studying the radiation hardness of CIS analog functions based only on 3.3V N-channel MOSFETs; • comparing the radiation hardness of shallow and deep CIS photodiodes; • clarifying the influence of gate oxide thickness on the radiation hardness of gate-overlap photodiode designs; • confirming and optimizing the dark current cancellation mechanism reported in [3]. A secondary objective is to clarify further the influence of irradiation conditions, i.e.…”