This paper describes the design and optimization of voltage controlled oscillators with quadrature outputs. Systematic design of fully integrated LC-VCOs with a high inductance tank leads to a cross-coupled double core LC-VCO as the optimal solution in terms of power consumption. Futhermore, a novel fully differential frequency tuning concept is introduced to ease high integration. The concepts are verified with a 0.25m standard CMOS fully integrated quadrature voltage-controlled oscillator (VCO) for zero-or low-IF DCS1800, DECT, or GSM receivers. At 2.5-V power supply voltage and a total power dissipation of 20 mW, the quadrature VCO features a worst-case phase noise of 143 dBc/Hz at 3-MHz frequency offset over the tuning range. The oscillator is tuned from 1.71 to 1.99 GHz through a differential nMOS/pMOS varactor input.
A 0.13-um CMOS fourth-order notch filter for the rejection
of the 5–6 GHz interference in UWB front-ends is reported.
The filter is integrated into an analog front-end for Mode #1 UWB.
A thorough analysis based on a simplified model of the filter is carried
out. An algorithm for the automatic tuning and calibration of
the filter is also discussed and demonstrated. Two versions of the
circuit are designed and fabricated: the first comprises a low-noise
amplifier and the filter, and the second expands it to a complete
front-end. In the latter version the filter was also redesigned. The
filter provides more than 35 dB of attenuation and has a tuning
range of 900 MHz, adding less than 30% power consumption to the
LNA. The out-of-band IIP3 (higher than -13.2 dBm with the filter
off) takes a 9-dB advantage from the filter and the compression of
the gain due to the out-of-band blocker is reduced by at least 6 dB
in the complete front-end. The conversion gain of the front-end is
25 dB per channel, its average noise figure is lower than 6.2 dB, and
its in-band 1-dB compression point is higher than -30 dBm at a
power consumption of 32 mW
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