We fabricated a vertical metal–insulator–semiconductor field-effect transistor (MISFET) with a heterostructure launcher and an undoped channel. Vertical MISFETs exhibit a high drain current density; however, their large output conductance is a disadvantage for the open-circuit voltage gain. In a previous study, a maximum voltage gain of 4.0 was found in a vertical MISFET with a heavily doped drain region and a 45-nm-wide channel mesa. The heavily doped drain region and a narrower channel width are effective in reducing the output conductance. In this study, we fabricated a device with the heavily doped drain region and a 23-nm-wide channel mesa structure. It was observed that the output conductance decreased from 120 to 57 mS/mm at a drain current density of 0.3 MA/cm2 with a narrower channel mesa. The maximum open-circuit voltage gain increased from 4.0 to 5.7.
Short Abstract-High on-currents (I on ) and low off-currents (I off ) under low supply voltage are important for logic applications. A heavily doped InP source was introduced to demonstrate the existence of high I on in InGaAs MOSFETs, and I D = 2.4 mA/ m at V D = 0.5 V was observed. GaAsSb source was introduced in InGaAs tunnel FET to realize low I off . Narrow channel body was found to be essential for steep sub-threshold (SS) dependence, and a fabricated GaAsSb/InGaAs vertical tunnel FET with a 26 nm wide body showed steep SS. In addition, an InGaAs/InP super-lattice source was studied to consider the possibility of simultaneous high I on and low I off realization.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.