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This paper presents a CMOS image sensor with a pinned-photodiode 4T active-pixel design (APS) that uses a buried-channel source follower (BSF) as the in-pixel amplifier. A prototype of the image sensor has been fabricated in a 0.18μm CMOS process. Measurements show that compared to a regular imager with a standard nMOS transistor surface-mode source follower (SSF), the new pixel structure reduces dark random noise by more than 50% and improves output swing by almost 100%. Moreover, the new pixel structure is able to minimize the random telegraph signal (RTS) noise. Nowadays, the random noise level of the pinned photodiode 4T APS has dropped to less than 5erms , of which the major contributors are believed to be 1/f and RTS noise from the in-pixel source follower [1]. It is commonly accepted that the 1/f noise is caused by lattice defects at the Si-SiO 2 interface of the MOS transistor. As processes scale down, the RTS noise appears in pixels that have only one active interface defect. Since the exact mechanism of the RTS noise is still unknown [2] and the use of correlated double-sampling (CDS) does not fully eliminate 1/f and RTS noise [3,4], no adequate technique is yet known for reducing 1/f and RTS noise. Therefore, these noise sources limit the imaging quality under low-light conditions. In this work, an in-pixel source follower based on a buried channel nMOS transistor is introduced, which is able to reduce 1/f and RTS noise. The buried channel requires an extra implantation, which pushes the highest potential in the channel away from the Si-SiO 2 interface, thus minimizing the possibility of carriers being trapped by lattice defects. As a result, the imager's read noise level can be significantly reduced. Furthermore, because the buried channel transistor has a negative threshold voltage, the pixel's output swing can be significantly improved. This means that "digital" transistors with reduced power supply voltages can be used in the pixel without limiting the pixel's output swing, saturation level and dynamic range. Figure 2.10.1 shows the pixel circuit, the readout timing and the cross section of the BSF. Similar to a standard pinned photodiode 4T structure, the pixel consists of a pinned photodiode (PPD), a reset transistor (RST), a transfer transistor (TG), a row select switch (RS) and a source follower (BSF). A standard CDS operation is applied to cancel the threshold mismatch and reset noise. During source follower operation, the maximum potential underneath the gate is determined by the channel doping profile, the floating diffusion (FD) voltage and the column bias current. The short-dashed line in the cross section presents the channel's maximum potential. The longdashed line presents the boundary of the depletion region. Figure 2.10.2 shows the comparison of the simulated and measured gate characteristic of the buried and surface channel source follower transistors.Increasing the implantation dose will shift the transistor threshold voltage towards negative values, and increasing implantation ener...

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