In the last 5 years, the availability of powerful DSP and Communications design software, and the emergence of relatively affordable devices that receive and digitize RF signals, has brought Software Defined Radio (SDR) to the desktops of many communications engineers. However, the more recent availability of very low cost SDR devices such as the RTL-SDR, costing less than $20, brings SDR to the home desktop of undergraduate and graduate students, as well as both professional engineers and the maker communities. Since the release of the various open source drivers for the RTL-SDR, many in the digital communications community have used this device to scan the RF spectrum and digitise I/Q signals that are being transmitted in the range 25MHz to 1.75GHz. This wide bandwidth enables the sampling of frequency bands containing signals such as FM radio, ISM signals, GSM, 3G and LTE mobile radio, GPS and so on. In this paper we will describe the opportunity and operation of the RTL-SDR, and the development of a hands-on, open-course for SDR. These educational materials can be integrated into core curriculum undergraduate and graduate courses, and will greatly enhance the teaching of DSP and communications theory, principles and applications. The lab and teaching materials have recently been used in Senior (4th year Undergraduate) courses and are available as open course materials for all to access, use and evolve

For transceivers operating in television white space (TVWS), frequency agility and strict spectral mask fulfillments are vital. In the U.K., TVWS covers a 320-MHz-wide frequency band in the UHF range, and the aim of this brief is to present a wideband digital up-and downconverter for this scenario. Sampling at radio frequency (RF), a two-stage digital conversion is presented, which consists of a polyphase filter (PPF) for implicit upsampling and decimation, and a filter-bank-based multicarrier approach to resolve the 8-MHz channels within the TVWS band. We demonstrate that the up-and downconversion of 40 such channels is hardly more costly than that of a single channel. Appropriate filter design can satisfy the mandated spectral mask and control the reconstruction error. A field-programmable gate array implementation is discussed, capable of running the wideband transceiver on a single Virtex-7 device with sufficient word length to preserve the spectral mask requirements of the system.

In this paper a Dynamic Spectrum Access (DSA) Physical layer (PHY) technique is proposed that allows Secondary User (SU) access to the traditional FM Radio spectrum (88-108 MHz) for alternative data communication applications. FM radio waves have excellent propagation characteristics for long distance transmission, and have high levels of penetration through buildings. Using tools such as a structured geolocation database of licensed Primary User (PU) FM Radio transmitters, unlicensed SUs can access portions of the 20 MHz-wide band and transmit signals that place spectral 'holes' with suitable guard bands around all known PUs. Based on the PU protection ratios published by Ofcom and the FCC, the operation of a FBMC (Filter Bank Multi-Carrier) transmitter is demonstrated for an urban environment, and through 'field test' simulation it is shown that the Out Of Band (OOB) leakage of the proposed PHY (energy in the 'holes' that can interfere with the PU) is 47 dB lower than that of using an equivalent OFDM PHY. The results show that the proposed PHY is a suitable candidate for DSA-SU communication (e.g. in smart city IoT applications), whilst ensuring the integrity of incumbent PU signals.

Partial Reconfiguration (PR) is a method for Field Programmable Gate Array (FPGA) designs which allows multiple applications to time-share a portion of an FPGA while the rest of the device continues to operate unaffected. Using this strategy, the physical layer processing architecture in Software Defined Radio (SDR) systems can benefit from reduced complexity and increased design flexibility, as different waveform applications can be grouped into one part of a single FPGA. Waveform switching often means not only changing functionality, but also changing the FPGA clock frequency. However, that is beyond the current functionality of PR processes as the clock components (such as Digital Clock Managers (DCMs)) are excluded from the process of partial reconfiguration. In this paper, we present a novel architecture that combines another reconfigurable technology, Dynamic Reconfigurable Port (DRP), with PR based on a single FPGA in order to dynamically change both functionality and also the clock frequency. The architecture is demonstrated to reduce hardware utilization significantly compared with standard, static FPGA design.

We present a white space communications test bed running in the Scottish Highlands and Islands, and discuss its feasibility for smart grid communications. The network aims to serve communities that have great potential for distributed generation of electricity, by means of wind, water, and tidal power. However, smart grid applications such as remote meter reading and load balancing are impaired by the scarcity or lack of communications infrastructure in remote rural areas such as the Scottish Highlands and Islands. We argue that the proposed system is based on a network of energy self-sufficient radio relay nodes that make it a robust and independent medium to support smart grid communications in rural settings

This paper presents the research carried out in developing and targeting a novel real-time Dynamic Spectrum Access (DSA) Frequency Spread Filter Bank Multicarrier (FS-FBMC) transmitter prototype to programmable 'ZynqSDR' Software Defined Radio (SDR) hardware, and introduces a series of experiments used to validate the design's 'cognitive' DSA capabilities. This transmitter is a proof of concept, that uses DSA techniques to enable Secondary Users (SUs) to access the band traditionally used for FM Radio broadcasting (88-108 MHz), and establish data communication channels in vacant parts of the FM Radio Primary User (PU) spectrum using a multicarrier modulation scheme with a Non Contiguous (NC) channel mask. Once implemented on the hardware, the transmitter is subjected to various FM Radio environments sampled from around Central Scotland, and it is demonstrated that it can dynamically adapt its NC transmitter mask in real time to protect the FM Radio signals it detects. A video is presented of this dynamic on-hardware spectral reconfiguration, and the reader is encouraged to view the video to appreciate the responsiveness of the design. An investigation into potential FBMC guardband sizes is carried out, with initial findings indicating a guardband of 200 kHz (either side of an FM Radio station) is required in order to prevent interference with the PUs. This paper also demonstrates the capabilities of the MATLAB R / Simulink R Model Based Design ZynqSDR workflow, and provides a case study and reference design that we feel other researchers working in this field can benefit from.

The availability of commercial Radio Frequency System on Chip (RFSoC) devices brings new possibilities for implementing Software Defined Radio (SDR) systems. Such systems are of increasing interest given the pace of innovation in wireless technology, and the pressure on RF spectrum resources, leading to a growing need to access the spectrum in more dynamic and innovative ways. In this paper, we present an SDR demonstration system based on the Xilinx RFSoC platform, which leverages the Pythonbased 'PYNQ' (Python Productivity for Zynq) software framework. In doing so, we highlight features that can be extremely useful for prototyping radio system design. Notably, our developed system features Python-based control of hardware processing blocks and Radio Frequency (RF) data converters, as well as direct visualisation of communications signals captured within the chip. The system architecture is reviewed, hardware and software components are discussed, functionality is demonstrated, and aspects of the system's performance are evaluated. Finally, it is noted that this combined RFSoC + PYNQ approach is readily extensible for other SDR systems; we highlight our online shared resources, and invite other engineers to investigate and build upon our work.

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