This paper describes mask topography effects of alternating phase shift masks for DUV lithography. First two options to achieve intensity balancing are discussed. Global phase errors of +lO cause a CD change of 3 nm and 8 nm CD placement errors. The CD placement appears to be the parameter affected most by phase errors. A sloped quartz edge with an angle of 30 causes a CD change of 10 nm. The CD sensitivity on local phase errors, i.e. quartz bumps or holes was also studied. The critical defect size of a quartz bump was seen to be 150 nm (5x) for 150 nm technology. For the investigation the recently developed topography simulator T-Mask was used. The simulator was first checked against analytical tests and experimental results.
New experiments on short-time diffusion of gold in silicon are presented. By means of both our experiments and experiments published elsewhere, diffusion of gold in silicon is investigated in the temperature range of 900 °C to 1100 °C. A complete set of parameters is determined from these experiments using Arrhenius’ law. It is found that the short-time diffusion experiments cannot be simulated without barrier energies for both the gold-point defect reactions and the Frenkel pair reaction. Their values have been determined as EAu/I=0.482 eV, EAuI/V=0.971 eV, and EI/V=0.30 eV.
The oxidation retarded diffusion (ORD) of antimony during dry oxidation is investigated at temperatures of 1000° and 1100°C. For the experiments float zone <100> silicon wafers with a pattern of silicon nitride and a free surface are used to obtain domains with normal intrinsic and retarded diffusion on the same wafers. Additionally, numerical simulations are performed to determine quantitatively the magnitude of ORD. The results are summarized and compared to published values. It seems remarkable that the recombination of self‐interstitials and vacancies at 1000°C is sufficiently fast to cause a significant retardation of the diffusion of antimony after only 500 min oxidation time.
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