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In this work, we deal with the design and implementation of a decimation filter to be used in wideband radio-frequency receiver. The paper outlines architecture considerations for multistandard wireless transceivers. Also, it describes the design steps and the tradeoffs concerning the hardware implementation. GSM and DECT standards specifications are met by the proposed filtering cascade structure. The filter processes six-bits data stream input from a fourth-order sigma-delta modulator and has been prototyped in a field-programmable gate array device.

is work is about reducing energy consumption in the receiver chain by limiting the use of the equalizer. It is to make the radio receiver aware of its environment and able to take decision to turn on or off the equalizer according to its necessity or not. When the equalizer is off, the computational complexity is reduced and the rate of reduction depends on the percentage of time during which this component is disabled. In order to achieve this scenario of adapting the use of the equalizer, we need to develop a decisionmaking technique that provides the receiver with the capacities of awareness and adaptability to the state of its environment. For this, we improve a technique based on a statistical modeling of the environment by de�ning two metrics as channel quality indicators to evaluate the effect of the intersymbol interferences and the channel fading. e statistical modeling technique allows to take into account the impact of the uncertainties of the estimated metrics on the decision making.

This work is about developing a decision making method, based on statistical modeling, for a cognitive radio receiver. By characterizing statistically the radio metrics, the intelligent equipment will be capable of making decisions on actions of reconfigurations, in order to adapt to the state of the environment. Through the adaptability of the radio receiver to the environment, we try also to reduce energy consumption by treating one scenario of reconfigurability which consists of switching off the equalizer when it is not necessary. Since this component is complex, the operation of turning it off should reduce the computational complexity of the receiver chain.

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This paper presents a solution for low power consumption in digital systems designs. The Double Base Number System (DBNS) representation recognized by its high sparseness is used for digital filters coefficients representation to reduce the switching activity, a key factor in power consumption.In this paper, we show that the use of the Canonic DBNS representation for filter coefficients representation leads to a dynamic power reduction average of 30% compared to the 2's complement representation. The second contribution of our work consists in the application of sub-expression sharing on the filter coefficients, already expressed in DBNS representation. Strengths and limitations of this optimization will be discussed in details throughout this paper.

The work presented in this paper consists of designing a cognitive engine for a cognitive radio receiver. This engine must provide to the radio receiver the ability to be aware of its environment and to make decisions about actions of reconfiguration; these actions aim to adapt the receiver architecture to the state of the environment. In our design we develop a decision making method based on a statistical modeling of the environment. To show the decision performance of the method, we treat one example of a scenario of reconfiguration by applying the cognitive engine; it is to decide if there is a problem of a weak signal or not.