The authors report on improved transport properties of Al2O3∕AlGaN∕GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs). It is found that the drift mobility in the MOSHFET structures with 4nm thick Al2O3 gate oxide is significantly higher than that in HFETs. The zero-bias mobilities are 1950 and 1630cm2∕Vs for the MOSHFET and HFET, respectively. An ∼40% increase of the saturation drain current in the MOSHFETs compared to the HFETs seems to be larger than expected from the passivation effects. The MOSHFET devices show a higher transconductance (with peak values of ∼115mS∕mm) than the HFETs (∼70mS∕mm). Analysis of the device performance indicates a decrease of the parasitic series resistance together with an enhancement of the effective velocity of the channel electrons in the MOSHFET devices.

The authors investigate 2μm gate-length InAlN∕GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS HEMTs) with 12nm thick Al2O3 gate insulation. Compared to the Schottky barrier (SB) HEMT with similar design, the MOS HEMT exhibits a gate leakage reduction by six to ten orders of magnitude. A maximal drain current density (IDS=0.9A∕mm) and an extrinsic transconductance (gme=115mS∕mm) of the MOS HEMT also show improvements despite the threshold voltage shift. An analytical modeling shows that a higher mobility of electrons in the channel of the MOS HEMT and consequently a higher number of electrons attaining the velocity saturation may explain the observed increase in gme after the gate insulation.

AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs) with 4 nm thick Al 2 O 3 gate oxide were prepared and their performance was compared with that of AlGaN/GaN HFETs. The MOSHFETs yielded ∼40% increase of the saturation drain current compared with the HFETs, which is larger than expected due to the gate oxide passivation. Despite a larger gate-channel separation in the MOSHFETs, a higher extrinsic transconductance than that of the HFETs was measured. The drift mobility of the MOSHFETs, evaluated on large-gate FET structures, was significantly higher than that of the HFETs. The zero-bias mobility for MOSHFETs and HFETs was 1950 cm 2 V -1 s -1 and 1630 cm 2 V -1 s -1 , respectively. These features indicate an increase of the drift velocity and/or a decrease of the parasitic series resistance in the MOSHFETs. The current collapse, evaluated from pulsed I−V measurements, was highly suppressed in the MOSHFETs with 4 nm thick Al 2 O 3 gate oxide. This result, together with the suppressed frequency dispersion of the capacitance, indicates that the density of traps in the Al 2 O 3 /AlGaN/GaN MOSHFETs was significantly reduced.

We present GaN-based high electron mobility transistors (HEMTs) with a 2-nm-thin InAlN/AlN barrier capped with highly doped n ++ GaN. Selective etching of the cap layer results in a well-controllable ultrathin barrier enhancement-mode device with a threshold voltage of +0.7 V. The n ++ GaN layer provides a 290-Ω/ sheet resistance in the HEMT access region and eliminates current dispersion measured by pulsed IV without requiring additional surface passivation. Devices with a gate length of 0.5-µm exhibit maximum drain current of 800 mA/mm, maximum transconductance of 400 mS/mm, and current cutoff frequency f T of 33.7 GHz. In addition, we demonstrate depletionmode devices on the same wafer, opening up perspectives for reproducible high-performance InAlN-based digital integrated circuits.Index Terms-Enhancement mode (E-mode), gate recess, high electron mobility transistor (HEMT), InAlN/GaN heterostructure. I N THE LAST decade, high electron mobility transistors (HEMTs) based on GaN have demonstrated excellent radiofrequency (RF) power switching and high-frequency performances due to its wide bandgap, large critical electric field, and high lattice-based polarization. While most results were shown on AlGaN barrier devices [1], recently, also InAlN/GaN-based HEMTs have demonstrated high-power and high-temperature performance, constituting a new class of lattice-matched stressfree thermally and chemically stable devices with enhanced polarization [2], [3]. This polarization, which is based on the polar nature of III-N materials, causes the usual depletion-mode (Dmode) operation of such devices. In the past, a lot of research has been carried out to increase the threshold voltage of HEMT devices toward enhancement-mode (E-mode) operation in order to reduce circuit design complexity, include device failsafe, or Manuscript even realize digital integrated circuits. On the one hand, several approaches were developed to raise the conduction band below the gate. By using p-doped GaN [4] or InGaN [5] interlayers, the transfer characteristic could be shifted to the normally off regime, but it reduced the device performance due to the limitation of acceptable forward bias. A similar approach was done using F+ ion implantation in order to incorporate positive charges below the gate [6]. The increased barrier also reduces the gate leakage current, allowing gate biasing up to 4 V [7]. However, such techniques may not be thermally stable above 500 • C, which counters the desirable property of GaN-based devices to withstand harsh environments. On the other hand, high-performing E-mode devices were achieved by reducing the barrier thickness below the gate [7], [8], thus decreasing the required voltage swing to pinch off the device. Nevertheless, high controllability and, consequently, good reproducibility of such a process are hard to achieve.In this letter, we report on a novel device structure for E-mode and D-mode HEMTs based on a 1-nm lattice-matched InAlN barrier with an additional 1-nm AlN interlayer. Using an only 2-nm-thin ...

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The Ni/Al 2 O 3 /InAlN/AlN/GaN metal-oxide-semiconductor heterostructure (MOS-H) is investigated using capacitance-voltage and capacitance-time characteristics in the temperature range of 25-300 • C. An anomalous positive voltage shift of the capacitance-voltage curve with increasing temperature was observed and attributed to the hole emission from the oxide/semiconductor interface states. Distribution of the interface states density, D it (E), at the Al 2 O 3 /InAlN interface was evaluated using a modification of the constant-capacitance deep-level transient spectroscopy. The MOS-H capacitor threshold voltage shift under negative bias was repetitively recorded as a function of time at elevated temperatures. D it in the range of 0.1-3 × 10 13 eV −1 cm −2 was determined.