The authors have studied In x Ga 1−x N / GaN ͑x Ϸ 15% ͒ quantum wells ͑QWs͒ using atomic force microscopy ͑AFM͒ and picosecond time resolved cathodoluminescence ͑pTRCL͒ measurements. They observed a contrast inversion between monochromatic CL maps corresponding to the high energy side ͑3.13 eV͒ and the low energy side ͑3.07 eV͒ of the QW luminescence peak. In perfect correlation with CL images, AFM images clearly show regions where the QW thickness almost decreases to zero. Pronounced spectral diffusion from high energy thinner regions to low energy thicker regions is observed in pTRCL, providing a possible explanation for the hindering of nonradiative recombination at dislocations.

Compared to the AlGaN alloy, which can only be grown under tensile strain on GaN, the AlInN alloy is predicted by Vegard's law to be lattice-matched ͑LM͒ on fully relaxed GaN templates for an indium content of ϳ17.5%, i.e., it can be grown either tensely or compressively on GaN. The effect of strain on the polarization induced sheet charge density at the Al 1−x In x N / AlN/ GaN heterointerfaces is carefully investigated for 6 and 14 nm thick AlInN barriers including a 1 nm thick AlN interlayer. The barrier indium content ranges at 0.03Յ x Յ 0.23 for 6 nm thick barriers and 0.07Յ x Յ 0.21 for 14 nm thick barriers. It is found that the two-dimensional electron gas ͑2DEG͒ density varies between ͑3.5Ϯ 0.1͒ ϫ 10 13 cm −2 and ͑2.2Ϯ 0.1͒ ϫ 10 13 cm −2 for 14 nm thick barriers. Finally, a 2DEG density up to ͑1.7Ϯ 0.1͒ ϫ 10 13 cm −2 is obtained for a nearly LM AlInN barrier with ϳ14.5% indium on GaN as thin as 6 nm.

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We discuss the characteristics of In0.17Al0.83N/GaN High Electron Mobility Transistors (HEMTs) with barrier thicknesses between 33 nm and 3 nm, grown on sapphire substrates by MOCVD. The maximum drain current (at VG = +2.0 V) decreased with decreasing barrier thickness due to the gate forward drive limitation and residual surface depletion effect. Full pinch-off and low leakage is observed. Even with 3nm ultra thin barrier the heterostructure and contacts are thermally highly stable (up to 1000°C).

Ternary semiconductor alloys based on the A y B1–y C stoichiometry are widely employed in electronic devices, and their composition plays a key role in band gap engineering of heterostructures. We have studied the crucial issue of accuracy in composition measurements of Al y Ga1–y N and Mg y Zn1–y O alloys using atom probe tomography (APT). The results indicate a similar behavior for both nitride and oxide systems. A correct site fraction y is measured at low field conditions, while Ga and Zn preferentially evaporate at high field, yielding an overestimation of y. Furthermore, APT data sets exhibit local biases depending on the distribution of the electrostatic field at the specimen surface. We estimate the detection efficiencies for each species and interpret the results through a model describing preferential evaporation in simple terms.

We report on GaN self-supported photonic structures consisting in freestanding waveguides coupled to photonic crystal waveguides and cavities operating in the near-infrared. GaN layers were grown on Si (111) by metal organic vapor phase epitaxy. E-beam lithography and dry etching techniques were employed to pattern the GaN layer and undercut the substrate. The combination of low-absorption in the infrared range and improved etching profiles results in cavities with quality factors as high as ∼5400. The compatibility with standard Si technology should enable the development of low cost photonic devices for optical communications combining wide-bandgap III-nitride semiconductors and silicon.

We report on the achievement of freestanding GaN photonic crystal L7 nanocavities with embedded InGaN/GaN quantum wells grown by metal organic vapor phase epitaxy on Si (111). GaN was patterned by e-beam lithography, using a SiO2 layer as a hard mask, and usual dry etching techniques. The membrane was released by underetching the Si (111) substrate. Micro-photoluminescence measurements performed at low temperature exhibit a quality factor as high as 5200 at ∼420 nm, a value suitable to expand cavity quantum electrodynamics to the near UV and the visible range and to develop nanophotonic platforms for biofluorescence spectroscopy.

We present GaN-based high electron mobility transistors (HEMTs) with a 2-nm-thin InAlN/AlN barrier capped with highly doped n ++ GaN. Selective etching of the cap layer results in a well-controllable ultrathin barrier enhancement-mode device with a threshold voltage of +0.7 V. The n ++ GaN layer provides a 290-Ω/ sheet resistance in the HEMT access region and eliminates current dispersion measured by pulsed IV without requiring additional surface passivation. Devices with a gate length of 0.5-µm exhibit maximum drain current of 800 mA/mm, maximum transconductance of 400 mS/mm, and current cutoff frequency f T of 33.7 GHz. In addition, we demonstrate depletionmode devices on the same wafer, opening up perspectives for reproducible high-performance InAlN-based digital integrated circuits.Index Terms-Enhancement mode (E-mode), gate recess, high electron mobility transistor (HEMT), InAlN/GaN heterostructure. I N THE LAST decade, high electron mobility transistors (HEMTs) based on GaN have demonstrated excellent radiofrequency (RF) power switching and high-frequency performances due to its wide bandgap, large critical electric field, and high lattice-based polarization. While most results were shown on AlGaN barrier devices [1], recently, also InAlN/GaN-based HEMTs have demonstrated high-power and high-temperature performance, constituting a new class of lattice-matched stressfree thermally and chemically stable devices with enhanced polarization [2], [3]. This polarization, which is based on the polar nature of III-N materials, causes the usual depletion-mode (Dmode) operation of such devices. In the past, a lot of research has been carried out to increase the threshold voltage of HEMT devices toward enhancement-mode (E-mode) operation in order to reduce circuit design complexity, include device failsafe, or Manuscript even realize digital integrated circuits. On the one hand, several approaches were developed to raise the conduction band below the gate. By using p-doped GaN [4] or InGaN [5] interlayers, the transfer characteristic could be shifted to the normally off regime, but it reduced the device performance due to the limitation of acceptable forward bias. A similar approach was done using F+ ion implantation in order to incorporate positive charges below the gate [6]. The increased barrier also reduces the gate leakage current, allowing gate biasing up to 4 V [7]. However, such techniques may not be thermally stable above 500 • C, which counters the desirable property of GaN-based devices to withstand harsh environments. On the other hand, high-performing E-mode devices were achieved by reducing the barrier thickness below the gate [7], [8], thus decreasing the required voltage swing to pinch off the device. Nevertheless, high controllability and, consequently, good reproducibility of such a process are hard to achieve.In this letter, we report on a novel device structure for E-mode and D-mode HEMTs based on a 1-nm lattice-matched InAlN barrier with an additional 1-nm AlN interlayer. Using an only 2-nm-thin ...