A new type of a capacitively coupled plasma source was developed and tested to remove harmful film layers and particles deposited on a wafer's edge, bevel and back-side during film deposition or other semiconductor chip processes. Plasma was generated along 2 mm of an edge and 4 mm of the back-side of the wafer, thereby removing only films and particles on a wafer edge, bevel and back-side without damaging patterns inside the wafer. Etch rates over 10 000 Å min −1 for SiO 2 and SiN films and rates over 6000 Å min −1 for polysilicon film were obtained.
The analysis and the modeling of a Low Voltage Triggered SCR (Silicon Controlled Rectifier) under vf-TLP (very-fast Transmission Line Pulse) measurements are reported. The results measured by vf-TLP system showed that the triggering voltage (Vt1) decreased and the second breakdown current (It2) increased in the comparison with the results measured by a standard 100ns TLP (Transmission Line Pulse) system. A compact model based on the vf-TLP measured characteristics is presented. The measurement result and the simulation data of the behavior approached model indicate a good correlation.
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