Analysis and modeling of a Low Voltage Triggered SCR ESD protection clamp with the very fast Transmission Line Pulse measurement

Abstract

The analysis and the modeling of a Low Voltage Triggered SCR (Silicon Controlled Rectifier) under vf-TLP (very-fast Transmission Line Pulse) measurements are reported. The results measured by vf-TLP system showed that the triggering voltage (Vt1) decreased and the second breakdown current (It2) increased in the comparison with the results measured by a standard 100ns TLP (Transmission Line Pulse) system. A compact model based on the vf-TLP measured characteristics is presented. The measurement result and the simulation data of the behavior approached model indicate a good correlation.