No abstract

No abstract

No abstract

A procedure to pattern thin metal films on a nanometer scale with a scanning tunneling microscope ͑STM͒ operating in air is reported. A 30 nm film of hydrogenated amorphous silicon ͑a-Si:H͒ is deposited on a 10 nm film of TaIr. Applying a negative voltage between the STM tip and the a-Si:H film causes the local oxidation of a-Si:H. The oxide which is formed is used as a mask to wet etch the not-oxidized a-Si:H and subsequently, the remaining pattern is transferred into the metal film by Ar ion milling. Metal wires as narrow as 40 nm have been fabricated. Since a-Si:H can be deposited in very thin layers on almost any substrate, the presented procedure can be applied to structure all kind of thin films on a nanometer scale. © 1995 American Institute of Physics.During the previous 5 years, the scanning tunneling microscope ͑STM͒ has attracted interest as a tool for lithography on a nanometer scale. [1][2][3][4][5][6][7] In scanning tunneling microscopy tip-substrate interactions are very local, making it possible to modify the surface of a substrate to a very high lateral resolution ͑Ͻ20 nm͒. Several methods to fabricate metallic nanowires using this technique, have been demonstrated. Ehrichs et al. 2 and McCord et al. 3 have used an STM induced chemical vapor deposition ͑CVD͒ process in which a metalorganic gas is decomposed between the STM tip and the substrate, depositing metal on the substrate surface. A drawback of this technique is that there is only a limited choice of metals which can be deposited, due to the number of gas precursors which are available. Alternatively, the STM can be used to expose organic resist layers. For example, McCord et al. 3 have used poly͑methylmethacrylate͒ PMMA, Marrian et al. 4 have used SAL 601 and recently Stockman et al. 5 have used a Langmuir-Blodgett film. Since these layers do not always conduct sufficiently, the STM tip can penetrate the resist during lithography which can limit the tip lifetime due to mechanical interactions between tip and layer.In this letter, we present a method to pattern a thin film on a nanometer scale with an STM operating in air, using on a conducting resist layer. The method was inspired by the work of Dagata et al. 1 who demonstrated that a hydrogen terminated silicon ͑111͒ surface can be locally oxidized with the STM. The oxide layer which is formed can act as a mask for etching the silicon, as was demonstrated by Snow et al. 6A thin film could be patterned with this method if a silicon layer which is both stable against oxidation in air and sufficiently conducting could be deposited on the metal film. Hydrogenated amorphous silicon ͑a-Si:H͒ is a material which can fulfill both requirements. It is stable against oxidation in air because of its high hydrogen content ͑Ϸ10 at. %͒.8 Thin films of a-Si:H can be highly doped, to make them electrically conducting for STM operation. In addition, with plasma enhanced chemical vapor deposition ͑PECVD͒ a layer of a-Si:H can be deposited on almost any surface at low temperature, because of the high r...

Magnetic properties of Ni nanowire arrays, prepared by oblique evaporation of Ni onto V-groove InP substrates, were investigated between 5 and 300 K using magnetoresistance and SQUID magnetization measurements. The results show that as-prepared wires, which range from 70–130 nm in width, have an easy axis of magnetization parallel to the wire axis at room temperature, but transverse to the wire axis at low temperature. The crossover of the easy axis direction from transverse to parallel as a function of temperature is more pronounced for the narrower wires. We interpret our results in terms of a competition between a temperature-dependent magnetic anisotropy (K⊥), which tends to align the magnetization transverse to the wire axis, and the shape anisotropy of the wires which tends to orient it along the wire axis. Several mechanisms are proposed (e.g., oblique evaporation, stress, and surface oxidation) from which K⊥ could originate. Based upon the stress values deduced from K⊥, and the thermal expansion mismatch between Ni and InP, the stress mechanism appears to dominate.

Low-temperature electrical transport measurements were performed on large arrays of 150-nm-wide superconducting vanadium ͑V͒ wires covered with either a thin layer of Au ͑V/Au͒ or Fe ͑V/Fe͒. The measurements were conducted using various electrical contact geometries. Our results show that a particular arrangement of the electrical contacts in combination with the superconducting proximity effect can result in a pronounced ''negative resistance'' anomaly below the resistive transition. We demonstrate that this ''negative resistance'' can be clearly reproduced by constructing resistor circuits based upon the particular contact arrangement.

Large arrays of parallel metallic nanowires ranging from 20 - 120 nm in width are fabricated using a general and relatively simple technique. Holographic laser interference exposure of photoresist and anisotropic etching are used to pattern the surface of InP(001) substrates into V-shaped grooves of 200 nm period. Subsequently metal is evaporated at an angle onto the V-grooved substrates, naturally resulting in thousands of ultra-narrow metallic wires in parallel. Resistance measurements proof that as-prepared wires are electrically continuous.

Large arrays of Au nanowires down to 50 nm in width are fabricated on V-grooved InP substrates. Holographic laser interference exposure of photoresist and anisotropic etching are used to pattern the surface of InP(001) substrates into V-shaped grooves with a 200 nm period. Next, the patterned substrates are covered with a thin Au film, which is subsequently structured into nanowires using a well controlled wet etching process. Initial characterization confirms that the wires are electrically continuous.