45nm-node multilevel Cu interconnects w i t h porous-ultia-low-k have successfully been integrated. Key features to realize 45nm-node interconnects are as follows: I ) porous ultra-low-k material NCS pano-Clustering Silica [I]) has been applied to both wire-level and via-level dielectrics (what we call hlI-NCS structure), and its sufficient robustness has been demonstmted. 2) 70-nm vias have been formed by high-NA 193nm lithography w i t h fine-tuned model-based OPC and multi-hard-mask dual-damascene process. More than 90% yields of 1M via chains have been obtained.
3) Good TDDB (Time-Dependent DielectricBreakdown) characteristics of 70nm Wire spacing filled w i t h NCS has been achieved. Because it is considered that applied-voltage (Vdd) of a 45nm-node technology will be almost the same as that of the previous technology, the dielectrics have to endure the high electrical field. NCS in Cu wiring has excellent insulating property without any pore sealing materials which cause either keff value or actual wire width to be worse.
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