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Abstract. A secure and dependable dynamic partial reconfiguration (DPR) system based on the AES-GCM cipher is developed, where the reconfigurable IP cores are protected by encrypting and authenticating their bitstreams with AES-GCM. In DPR systems, bitstream authentication is essential for avoiding fatal damage caused by inadvertent bitstreams. Although encryption-only systems can prevent bitstream cloning and reverse engineering, they cannot prevent erroneous or malicious bitstreams from being accepted as valid. If a bitstream error is detected after the system has already been partly configured, the system must be reconfigured with an errorless bitstream or at worst rebooted since the DPR changes the hardware architecture itself and the system cannot recover itself to the initial state by asserting a reset signal. In this regard, our system can recover from configuration errors without rebooting. To the authors' best knowledge, this is the first DPR system featuring both bitstream protection and error recovery mechanisms. Additionally, we clarify the relationship between the computation time and the bitstream block size, and derive the optimal internal memory size necessary to achieve the highest throughput. Furthermore, we implemented an AES-GCMbased DPR system targeting the Virtex-5 device on an off-the-shelf board, and demonstrated that all functions of bitstream decryption, verification, configuration, and error recovery work correctly. This paper clarifies the throughput, the hardware utilization, and the optimal memory configuration of said DPR system.

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We show that Xe ion irradiation with 80 MeV to GdBa2Cu3Oy-coated conductors creates different morphologies of columnar defects (CDs) depending on the irradiation angles θi relative to the c-axis: continuous CDs with a larger diameter are formed for oblique irradiation at θi = 45°, whereas the same ion beam at a different angle (θi = 0°) induces the formation of discontinuous CDs. The direction-dependent morphologies of CDs significantly affect the angular behavior of the critical current density Jc. In particular, low-energy irradiation defects induce further improvement of Jc in a unique combination of irradiation angles of θi = 0° and ±45°: discontinuous CDs at θi = 0° and crossed CDs at θi = ±45° provide correlated pinning in a wide angular range, which is more strongly enhanced by each other via the pinning of kinks.

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In this paper, a 60 GHz CMOS on-chip dipole antenna with helium-3 ion irradiated silicon substrate is designed using knowledge of electromagnetic simulation modeling. Rectangular region with 500 um x 1000 um around the dipole is irradiated by helium-3 ion and conductivity is reduced to 0.01 S/m (1 k Ohm cm). The width of dipole section is wide for broad bandwidth and reduction of conductor loss. There are a taper section and stub for impedance matching. A backing metal reduces back radiation. At 62 GHz, the calculated reflection, radiation efficiency and gain are -15 dB, 48 % and 2.7 dBi, respectively.

No abstract

We developed a content delivery system using a partially reconfigurable FPGA to securely distribute digital content on the Internet. With partial reconfigurability of a Xilinx Virtex-II Pro FPGA, the system provides an innovative single-chip solution for protecting digital content. In the system, a partial circuit must be downloaded from a server to the client terminal to play content. Content will be played only when the downloaded circuit is correctly combined (= interlocked) with the circuit built in the terminal. Since each circuit has a unique I/O configuration, the downloaded circuit interlocks with the corresponding built-in circuit designed for a particular terminal. Thus, the interface of the circuit itself provides a novel authentication mechanism. This paper describes the detailed architecture of the system and clarify the feasibility and effectiveness of the system. In addition, we discuss a fail-safe mechanism and future work necessary for the practical application of the system.