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We present an integrated 2:1 multiplexer and a companion 1:2 demultiplexer in CMOS. Both integrated circuits (ICs) operate up to a bit rate of 40 Gb/s. The 2:1 multiplexer features two in-phase data inputs which are achieved by a master-slave flip-flop and a master-slave-master flip-flop. Current-mode logic is used because of the higher speed compared to static CMOS and the robustness against common-mode disturbances. The multiplexer uses no output buffer and directly drives the 50-environment. An inductance connected in series to the output in combination with shunt peaking is used to enhance the bandwidth of the multiplexer. Fully symmetric on-chip inductors are used for peaking. The inductors are mutually coupled to save chip area. Lumped equivalent models of both peaking inductors allow optimization of the circuit. The ICs are fabricated in a 120-nm standard CMOS technology and use 1.5-V supply voltage. Measured eye diagrams of both ICs demonstrate their performance.

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The high-frequency performance of a novel SiGe HBT module with mono-crystalline base link is investigated in an industrial 0.13 µm BiCMOS environment. The main feature of this new HBT module is a significant reduction of the external base resistance as shown here by direct comparison with a conventional double-poly-silicon technology. Peak f T /f max values of 300 GHz/500 GHz are achieved. A minimum CML ring oscillator gate delay of 1.8 ps and a record operation frequency for a SiGe static frequency divider of 161 GHz are demonstrated.