Industrial mass production of solar cells is at a transition toward carrier‐selective junction solar cells with passivating contacts such as TOPCon, POLO, or heterojunction technology (HJT). At the same time, many manufacturers consider switching from p‐type Cz‐Si to n‐type Cz‐Si wafers. This contribution indicates that Ga‐doped p‐type Cz‐Si material is still a viable option for the new type of devices while giving an opportunity to benefit from lower wafer cost. The minority carrier diffusion lengths that are an order of magnitude larger than the thickness of the studied HJT and TOPCoRE devices are reported. Stability aspects for operation in the field are discussed. Best TOPCoRE solar cells on Ga‐doped Cz‐Si show a 0.2% higher efficiency than their co‐processed n‐type counterparts.
In this work, we analyse passivated emitter and rear cells (PERC), based on wafers made from seed manipulation for artificially controlled defects technique (SMART) monocrystalline silicon, magnetically grown and conventional Czochralski (mCz and Cz) silicon, and high‐performance multicrystalline (hpm) silicon. All wafers were processed identically except for the hpm wafers, which received an acidic texture instead of random pyramids. The energy conversion efficiency η of the SMART cells of 21.4 % is similar to the mCz cells (21.5 %) while being more than
1.90.1em%abs higher than for the hpm cells. Furthermore, we here show for the first time that light‐ and elevated temperature‐induced degradation (LeTID) is mitigated in hpm, Cz and SMART PERC cells without significant losses in initial efficiency by an adapted fast‐firing process, incorporating slower firing ramps that can be used in industrial production. The cells that are fired with these ramps show no significant efficiency loss (
10.1em%rel
Herein, boron‐doped cast‐monocrystalline silicon wafers that have been fabricated using the Seed Manipulation for ARtificially controlled defect Technique (SMART mono‐Si) are examined. Their suitability for passivated emitter and rear cell (PERC) fabrication is investigated. Applying a zero busbar layout energy conversion efficiencies of η = 21.9% for SMART mono‐Si, η = 22.2% for gallium‐doped Cz‐Si (Cz‐Si:Ga), and η = 22.3% for boron‐doped Cz‐Si (Cz‐Si:B) are achieved at similar doping levels between 0.7 Ω cm ≤ ρB ≤ 1.0 Ω cm. Therefore, SMART mono‐Si PERCs show almost the same performance as Cz‐Si PERCs. Apart from the performance of SMART mono‐Si PERCs, the minority charge carrier bulk lifetime τB of the SMART mono‐Si wafers after different high‐temperature process steps in the PERC process flow is investigated. After emitter formation, this analysis confirms the high material quality of SMART mono‐Si yielding τB ≈ 1.3 ms at an injection level of Δn = 1015 cm−3. The bulk lifetime after firing is similar to the level determined for mCz‐Si:B and Cz‐Si:Ga reference wafers of similar doping level.
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