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We present a both‐sides‐contacted thin‐film crystalline silicon (c‐Si) solar cell with a confirmed AM1.5 efficiency of 19.1% using the porous silicon layer transfer process. The aperture area of the cell is 3.98 cm2. This is the highest efficiency ever reported for transferred Si cells. The efficiency improvement over the prior state of the art (16.9%) is achieved by implementing recent developments for Si wafer cells such as surface passivation with aluminum oxide and laser ablation for contacting. The cell has a short‐circuit current density of 37.8 mA cm−2, an open‐circuit voltage of 650 mV, and a fill factor of 77.6%. Copyright © 2011 John Wiley & Sons, Ltd.

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We present experimental results for interdigitated back contacted (IBC) solar cells with passivating POLO contacts for both polarities with a nominal intrinsic poly‐Si region between them. We reach efficiencies of 26.1% and 24.9% on a 1.3 Ω cm and 80 Ω cm p‐type FZ wafer and 24.6% on a 2 Ω cm n‐type Cz wafer, respectively. The initially measured implied efficiency potentials of the cells after passivating the surfaces are very similar, namely, 26.8%, 26.8%, and 26.4%, respectively. We attribute the difference between the efficiency potential and the final current‐voltage measurement to degradation, perimeter, and series and shunt resistance losses, which we quantify by lifetime measurements. With these measurements in combination with a finite element simulation, we determine the surface recombination velocity in the nominal intrinsic poly‐Si region to be in the range from 13 to 21 cm s−1. Using the same approach, we analyze the increase of the front surface recombination velocity during cell processing from 2 to 10 cm s−1 for the 1.3 Ω cm and from 0.5 to 2.3 cm s−1 for the 80 Ω cm. This leads to the fact that cells fabricated on lowly doped bulk material are more vulnerable to a process‐induced degradation of the surface passivation quality. We further determine the theoretical limits of the cells by firstly idealizing the recombination (28% for 1.3 Ω cm and 28.2% for 80 Ω cm) and secondly also idealizing the optics of the solar cells (29.4% and 29.5%).

This is because the high conductivity of the poly-Si does not impede a transport limitation. Therefore, a separation of the n-type POLO (nPOLO) and p-type POLO (pPOLO) contact fingers is required [25][26][27][28][29] .In this work we employ a POLO junction scheme that consists of an initially full area intrinsic poly-Si (i poly-Si) layer that is locally doped by ion implantation. From process leanness point of view an attractive option to avoid these pn junctions in the poly-Si is to leave an (i) poly-Si region between emitter and base fingers. This is expected to result in lateral p(i)n poly-Si junction at the rear side of the IBC cell, which is connected in parallel to the nPOLO/p-type c-Si junctions ( Fig. 1a). By applying the described junction scheme we demonstrated a solar cell with an efficiency of 26.1% 11,21 .This concept was previously tested by other groups on precursor level 30 achieving a V OC of 682 mV with an pFF of 80% and on the cell level 27 yielding an efficiency of 18.4%. Both devices showed high ideality factors pointing to a non-ideal recombination in the space charge region. To evaluate why our cell, in contrast, does not suffer from a high ideality factor we perform a systematic study of the device physics of the resulting p(i)n poly-Si diodes.We quantify the defect density in our poly-Si layers prior and after hydrogenation using time-dependent photoluminescence decay measurements in the picosecond regime.As the purpose of the (i) poly-Si regions is to suppress high recombination currents across the p(i)n diode a large (i) poly-Si region is desirable. On the other hand, we observed a poor passivation quality of the c-Si absorber by the iPOLO on full-area lifetime test structures (see below). This is due to the moderate chemical passivation of SiO x on p-type Si, which further degrades when forming the nanometer-sized pinholes in the interfacial oxide 31 . This reasoning favors small (i) poly-Si widths. To find an optimum between these counteracting requirements, we experimentally vary the width of the (i) poly-Si region from nominal d gap = 0 µm up to 380 µm.We experimentally find that a width of the initially i poly-Si layer of d gap = 30 µm together with a high annealing temperature of over 1000 °C enables a record cell efficiency of 26.1%. From measurements on full area test structures and numerical device simulations we know that the surface recombination velocity at the intrinsic poly-Si is above 2000 cm/s and would limit the device efficiency to 15%. We conclude that the nominally intrinsic poly-Si layer is no longer intrinsic after the full cell process.We therefore investigate an inter-diffusion of dopants from the n-type and p-type doped fingers into the initially intrinsic poly-Si region by a lateral Time of Flight Secondary Ion Mass Spectrometry (ToF-SIMS) measurement. Combining all three aspects, we are, for the first time, able to present a comprehensive understanding of the working principle of high-efficient POLO IBC cells with p(i)n poly-Si diodes. Scientific RepoRtS |(202...