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An electrical-balance duplexer achieving state-ofthe-art linearity and insertion loss performance is presented, enabled by partially depleted RF silicon-on-insulator (SOI) CMOS technology. A single-ended configuration avoids the common-mode isolation problem suffered by topologies with a differential low-noise amplifier (LNA). Highly-linear switched capacitors allow for impedance balancing to antennas with <1.5:1 voltage standing wave ratio (VSWR) from 1.9 to 2.2 GHz. +70 dBm input-referred 3 rd -order intercept point (IIP3) is achieved under high transmitter (TX) power (+30.5 dBm max.). TX insertion loss is <3.7 dB and receiver insertion loss is <3.9 dB.

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