We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P + /Deep N-well junction with a circular shape, for which N-well is intentionally excluded to achieve a wide depletion region, thus enabling lower tunneling noise and better timing jitter as well as a higher photon detection efficiency and a wider spectrum. In order to prevent premature edge breakdown, a P-type guard ring is formed at the edge of the junction, and it is optimized to achieve a wider photon-sensitive area. In addition, metal-1 is used as a light reflector to improve the detection efficiency further in backside illumination. With the optimized 3-D stacked 45-nm CMOS technology for back-illuminated image sensors, the proposed SPAD achieves a dark count rate of 55.4 cps/µm 2 and a photon detection probability of 31.8% at 600 nm and over 5% in the 420-920 nm wavelength range. The jitter is 107.7 ps full width at half-maximum with negligible exponential diffusion tail at 2.5 V excess bias voltage at room temperature. To the best of our knowledge, these are the best results ever reported for any back-illuminated 3-D stacked SPAD technologies.
A submicron pixel’s light and dark performance were studied by experiment and simulation. An advanced node technology incorporated with a stacked CMOS image sensor (CIS) is promising in that it may enhance performance. In this work, we demonstrated a low dark current of 3.2 e−/s at 60 °C, an ultra-low read noise of 0.90 e−·rms, a high full well capacity (FWC) of 4100 e−, and blooming of 0.5% in 0.9 μm pixels with a pixel supply voltage of 2.8 V. In addition, the simulation study result of 0.8 μm pixels is discussed.
Light guide, a novel dielectric structure consisting of PE-Oxide and FSG-Oxide, has been developed to reduce crosstalk in 0.18-m CMOS image sensor technology. Due to the difference in refraction index (1.46 for PE-Oxide and 1.435 for FSG-Oxide), major part of the incident light can be totally reflected at the interface of PE-Oxide/FSG-Oxide, as the incidence angle is larger than total reflection angle. With this light guide, the pixel sensing capability can be enhanced and to reduce pixel crosstalk. Small pixels with pitch 3.0-m and 4.0-m have been characterized and examined. In 3.0-m pixel, optical crosstalk achieves 30% reduction for incidence angle of light at 10 .
This article introduces a modular, direct time-offlight (TOF) depth sensor. Each module is digitally synthesized and features a 2× (8 × 8) single-photon avalanche diode (SPAD) pixel array, an edge-sensitive decision tree, a shared time-todigital converter (TDC), 21-bit per-pixel memory, and in-locus data processing. Each module operates autonomously, by internal data acquisition, management, and storage, being periodically read out by an external access. The prototype was fabricated in a TSMC 3-D-stacked 45/65-nm CMOS technology, featuring backside illumination (BSI) SPAD detectors on the top tier, and readout circuit on the bottom tier. The sensor was characterized by single-point measurements, in two different modes of resolution and range. In low-resolution mode, a maximum of 300-m and 80-cm accuracy was recorded; on the other hand, in highresolution mode, the maximum range and accuracy were 150 m and 7 cm, respectively. The module was also used in a flexible scanning light detection and ranging (LiDAR) system, where a 256 × 256 depth map, with millimeter precision, was obtained. A laser signature based on pulse-position modulation (PPM) is also proposed, achieving a maximum of 28-dB interference reduction.
The structural and electrical properties of β-SiC thin films grown on a (100) Si substrate by low pressure rapid thermal chemical vapor deposition (LP-RTCVD) at as low as 2.5 Torr are reported. SiC growth was achieved by the reaction of SiH4 (5% in H2) and C3H8 (5% in H2) from 1100 to 1250° C. The structural properties of SiC thin films were investigated by X-ray diffraction and scanning electron microscope (SEM) analysis. The X-ray diffraction shows that the full width at half-maximum (FWHM) is 0.34-0.35° for Si/C ratio of 0.4-0.7. An epitaxial SiC thickness up to 8 µ m was also observed by SEM.
The unintentionally doped SiC film is n-type with electron mobility of 132-254 cm2/V·s for carrier concentration around 1017 cm-3 and resistivity 0.08-0.3 Ω· cm, based on both four-point probe and Hall measurements. To our knowledge, the measured mobility is the highest of those reported for low-pressure CVD-grown β-SiC epilayers. The optimum growth temperature and Si/C ratio were 1150° C and 0.6, respectively.
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